Optimizing Matrix Multiplication on Arm Architectures

• Item type: SIG Technical Reports(1)
• 公開日: 2023-11-28
• タイトル: Optimizing Matrix Multiplication on Arm Architectures
• タイトル / 言語: en
• タイトル: Optimizing Matrix Multiplication on Arm Architectures
• 言語: eng
• キーワード / 主題Scheme: Other
• キーワード / 主題: アーキテクチャ
• 資源タイプ / 資源タイプ識別子: http://purl.org/coar/resource_type/c_18gh
• 資源タイプ: technical report
• 著者所属: Tokyo Institute of Technology／RIKEN Center for Computational Science
• 著者所属: National Institute of Advanced Industrial Science and Technology (AIST)／RIKEN Center for Computational Science
• 著者所属: Tokyo Institute of Technology
• 著者所属: RIKEN Center for Computational Science
• 著者所属: RIKEN Center for Computational Science
• 著者所属(英): en
• 著者所属(英): Tokyo Institute of Technology / RIKEN Center for Computational Science
• 著者所属(英): en
• 著者所属(英): National Institute of Advanced Industrial Science and Technology (AIST) / RIKEN Center for Computational Science
• 著者所属(英): en
• 著者所属(英): Tokyo Institute of Technology
• 著者所属(英): en
• 著者所属(英): RIKEN Center for Computational Science
• 著者所属(英): en
• 著者所属(英): RIKEN Center for Computational Science
• 著者名: Du, Wu; Peng, Chen; Toshio, Endo; Satoshi, Matsuoka; Mohamed, Wahib
• 著者名(英): Du, Wu; Peng, Chen; Toshio, Endo; Satoshi, Matsuoka; Mohamed, Wahib
• 論文抄録 / 内容記述タイプ: Other
• 論文抄録 / 内容記述: This paper presents armGEMM, a novel approach aimed at enhancing the performance of irregular General Matrix Multiplication (GEMM) operations on popular Arm architectures. Designed to support a wide range of Arm processors, from edge devices to high-performance CPUs. armGEMM optimizes GEMM by intelligently combining fragments of auto-generated micro-kernels, incorporating hand-written optimizations to improve computational efficiency. We optimize the kernel pipeline by tuning the register reuse and the data load/store overlapping. In addition, we use a dynamic tiling scheme to generate balanced tile shapes, based on the shapes of the matrices. We build armGEMM on top of the TVM framework where our dynamic tiling scheme prunes the search space for TVM to identify the optimal combination of parameters for code optimization. Evaluations on five different classes of Arm chips demonstrate the advantages of armGEMM. In most cases involving irregular matrices, armGEMM outperforms state-of-the-art implementations like LIBXSMM, LibShalom, OpenBLAS, and Eigen.
• 論文抄録(英) / 内容記述タイプ: Other
• 論文抄録(英) / 内容記述: This paper presents armGEMM, a novel approach aimed at enhancing the performance of irregular General Matrix Multiplication (GEMM) operations on popular Arm architectures. Designed to support a wide range of Arm processors, from edge devices to high-performance CPUs. armGEMM optimizes GEMM by intelligently combining fragments of auto-generated micro-kernels, incorporating hand-written optimizations to improve computational efficiency. We optimize the kernel pipeline by tuning the register reuse and the data load/store overlapping. In addition, we use a dynamic tiling scheme to generate balanced tile shapes, based on the shapes of the matrices. We build armGEMM on top of the TVM framework where our dynamic tiling scheme prunes the search space for TVM to identify the optimal combination of parameters for code optimization. Evaluations on five different classes of Arm chips demonstrate the advantages of armGEMM. In most cases involving irregular matrices, armGEMM outperforms state-of-the-art implementations like LIBXSMM, LibShalom, OpenBLAS, and Eigen.
• 書誌レコードID / 収録物識別子タイプ: NCID
• 書誌レコードID / 収録物識別子: AN10463942
• 書誌情報: 研究報告ハイパフォーマンスコンピューティング（HPC）; 巻 2023-HPC-192, 号 3, p. 1-9, 発行日 2023-11-28
• ISSN / 収録物識別子タイプ: ISSN
• ISSN / 収録物識別子: 2188-8841
• Notice: SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc.
• 出版者 / 言語: ja
• 出版者: 情報処理学会