System-level Design Method for Control Systems with Hardware-implemented Interrupt Handler

• Item type: Journal(1)
• 公開日: 2015-08-15
• タイトル: System-level Design Method for Control Systems with Hardware-implemented Interrupt Handler
• タイトル / 言語: en
• タイトル: System-level Design Method for Control Systems with Hardware-implemented Interrupt Handler
• 言語: eng
• キーワード / 主題Scheme: Other
• キーワード / 主題: [特集：組込みシステム工学] hardware/software co-design, design environments, design space exploration, interrupt handling
• 資源タイプ / 資源タイプ識別子: http://purl.org/coar/resource_type/c_6501
• 資源タイプ: journal article
• 著者所属: Nagoya University
• 著者所属: Nagoya University
• 著者所属: Nagoya University
• 著者所属: Nagoya University
• 著者所属(英): en
• 著者所属(英): Nagoya University
• 著者所属(英): en
• 著者所属(英): Nagoya University
• 著者所属(英): en
• 著者所属(英): Nagoya University
• 著者所属(英): en
• 著者所属(英): Nagoya University
• 著者名: Yuki, Ando; Shinya, Honda; Hiroaki, Takada; Masato, Edahiro
• 著者名(英): Yuki, Ando; Shinya, Honda; Hiroaki, Takada; Masato, Edahiro
• 論文抄録 / 内容記述タイプ: Other
• 論文抄録 / 内容記述: In this paper, we propose a system-level design method for control systemsthat enables the development of Hardware-implemented interrupt handler. The increasing complexity of control systems has led to a rise in the frequencyof interrupts. As a result, the processor load increases, leading to a deterioration in thelatency of interrupt processing. To solve these problems, we require dedicated hardware that is activated by aninterrupt and can directly access devices during its processing. The proposed method enables control systems with the above dedicatedhardware to be developed using a model that abstracts an interrupt, interruptprocessing, and communication between the control processing and devices. We have developed a system-level design tool which automatically generates thetarget implementation from the model. Case studies on a motor control system show that the proposed methodreduces the processor load, improves the latency of the interrupt processing,and enables the design space exploration for the control system.; \n------------------------------; This is a preprint of an article intended for publication Journal of; Information Processing(JIP). This preprint should not be cited. This; article should be cited as: Journal of Information Processing Vol.23(2015) No.5 (online); ------------------------------
• 論文抄録(英) / 内容記述タイプ: Other
• 論文抄録(英) / 内容記述: In this paper, we propose a system-level design method for control systemsthat enables the development of Hardware-implemented interrupt handler. The increasing complexity of control systems has led to a rise in the frequencyof interrupts. As a result, the processor load increases, leading to a deterioration in thelatency of interrupt processing. To solve these problems, we require dedicated hardware that is activated by aninterrupt and can directly access devices during its processing. The proposed method enables control systems with the above dedicatedhardware to be developed using a model that abstracts an interrupt, interruptprocessing, and communication between the control processing and devices. We have developed a system-level design tool which automatically generates thetarget implementation from the model. Case studies on a motor control system show that the proposed methodreduces the processor load, improves the latency of the interrupt processing,and enables the design space exploration for the control system.; \n------------------------------; This is a preprint of an article intended for publication Journal of; Information Processing(JIP). This preprint should not be cited. This; article should be cited as: Journal of Information Processing Vol.23(2015) No.5 (online); ------------------------------
• 書誌レコードID / 収録物識別子タイプ: NCID
• 書誌レコードID / 収録物識別子: AN00116647
• 書誌情報: 情報処理学会論文誌; 巻 56, 号 8, 発行日 2015-08-15
• ISSN / 収録物識別子タイプ: ISSN
• ISSN / 収録物識別子: 1882-7764