An Improvement of Switch-on-Future-Event Multithreading

• Item type: SIG Technical Reports(1)
• 公開日: 2010-07-27
• タイトル: An Improvement of Switch-on-Future-Event Multithreading
• タイトル / 言語: en
• タイトル: An Improvement of Switch-on-Future-Event Multithreading
• 言語: eng
• キーワード / 主題Scheme: Other
• キーワード / 主題: プロセッサ高速化手法
• 資源タイプ / 資源タイプ識別子: http://purl.org/coar/resource_type/c_18gh
• 資源タイプ: technical report
• 著者所属: Graduate School of Information Science and Technology, The University of Tokyo
• 著者所属: Graduate School of Information Science and Technology, The University of Tokyo／Research Fellow of the Japan Society for the Promotion of Science (DC2)
• 著者所属: Graduate School of Information Science and Technology, The University of Tokyo
• 著者所属: Graduate School of Information Science and Technology, The University of Tokyo
• 著者所属: Graduate School of Information Science and Technology, The University of Tokyo
• 著者所属(英): en
• 著者所属(英): Graduate School of Information Science and Technology, The University of Tokyo
• 著者所属(英): en
• 著者所属(英): Graduate School of Information Science and Technology, The University of Tokyo / Research Fellow of the Japan Society for the Promotion of Science (DC2)
• 著者所属(英): en
• 著者所属(英): Graduate School of Information Science and Technology, The University of Tokyo
• 著者所属(英): en
• 著者所属(英): Graduate School of Information Science and Technology, The University of Tokyo
• 著者所属(英): en
• 著者所属(英): Graduate School of Information Science and Technology, The University of Tokyo
• 著者名: Naruki, Kurata; Ryota, Shioya; Jun, Nakashima; Masahiro, Goshima; Shuichi, Sakai
• 著者名(英): Naruki, Kurata; Ryota, Shioya; Jun, Nakashima; Masahiro, Goshima; Shuichi, Sakai
• 論文抄録 / 内容記述タイプ: Other
• 論文抄録 / 内容記述: “Delinquent” instructions are a small number of static instructions that cause most branch prediction misses and cache misses in a program. One of the important features of those delinquent instructions is that most of them are executed in small loops. We have proposed a new scheme of multithreading called Switch-on-Future-Event Multithreading (SoFE-MT) that hides a latency of delinquent instructions by multithreading execution of a loop in a single program. The conventional SoFE-MT did not assume periodic memory cache misses or memory access order violation between threads which often occur in a loop. We propose a memory access prediction system and a memory confliction detection system to deal with such problems. Simulation results shows that our proposal achieves performance improvement by an average of 2.4% and a maximum of 15.3%.
• 論文抄録(英) / 内容記述タイプ: Other
• 論文抄録(英) / 内容記述: “Delinquent” instructions are a small number of static instructions that cause most branch prediction misses and cache misses in a program. One of the important features of those delinquent instructions is that most of them are executed in small loops. We have proposed a new scheme of multithreading called Switch-on-Future-Event Multithreading (SoFE-MT) that hides a latency of delinquent instructions by multithreading execution of a loop in a single program. The conventional SoFE-MT did not assume periodic memory cache misses or memory access order violation between threads which often occur in a loop. We propose a memory access prediction system and a memory confliction detection system to deal with such problems. Simulation results shows that our proposal achieves performance improvement by an average of 2.4% and a maximum of 15.3%.
• 書誌レコードID / 収録物識別子タイプ: NCID
• 書誌レコードID / 収録物識別子: AN10096105
• 書誌情報: 研究報告計算機アーキテクチャ（ARC）; 巻 2010-ARC-190, 号 27, p. 1-9, 発行日 2010-07-27
• Notice: SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc.
• 出版者 / 言語: ja
• 出版者: 情報処理学会