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アイテム

  1. 研究報告
  2. システム・アーキテクチャ(ARC)
  3. 2022
  4. 2022-ARC-248

Evaluation of Microprocessors Placed-and-Routed with CNFET

https://ipsj.ixsq.nii.ac.jp/records/217093
https://ipsj.ixsq.nii.ac.jp/records/217093
e963cc99-3065-4a73-9ada-1b872104b9e4
名前 / ファイル ライセンス アクション
IPSJ-ARC22248005.pdf IPSJ-ARC22248005.pdf (838.6 kB)
Copyright (c) 2022 by the Information Processing Society of Japan
オープンアクセス
Item type SIG Technical Reports(1)
公開日 2022-03-03
タイトル
タイトル Evaluation of Microprocessors Placed-and-Routed with CNFET
タイトル
言語 en
タイトル Evaluation of Microprocessors Placed-and-Routed with CNFET
言語
言語 eng
キーワード
主題Scheme Other
主題 プロセッサ・アーキテクチャ
資源タイプ
資源タイプ識別子 http://purl.org/coar/resource_type/c_18gh
資源タイプ technical report
著者所属
The University of Electro-Communications
著者所属
The University of Electro-Communications
著者所属
The University of Electro-Communications
著者所属
Logic Research Co.,Ltd
著者所属
University of Tokyo
著者所属
The University of Electro-Communications
著者所属
The University of Electro-Communications
著者所属(英)
en
The University of Electro-Communications
著者所属(英)
en
The University of Electro-Communications
著者所属(英)
en
The University of Electro-Communications
著者所属(英)
en
Logic Research Co.,Ltd
著者所属(英)
en
University of Tokyo
著者所属(英)
en
The University of Electro-Communications
著者所属(英)
en
The University of Electro-Communications
著者名 Chenlin, Shi

× Chenlin, Shi

Chenlin, Shi

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Kai, Sasaki

× Kai, Sasaki

Kai, Sasaki

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Shinobu, Miwa

× Shinobu, Miwa

Shinobu, Miwa

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Tongxin, Yang

× Tongxin, Yang

Tongxin, Yang

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Ryota, Shioya

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Ryota, Shioya

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Hayato, Yamaki

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Hayato, Yamaki

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Hiroki, Honda

× Hiroki, Honda

Hiroki, Honda

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著者名(英) Chenlin, Shi

× Chenlin, Shi

en Chenlin, Shi

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Kai, Sasaki

× Kai, Sasaki

en Kai, Sasaki

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Shinobu, Miwa

× Shinobu, Miwa

en Shinobu, Miwa

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Tongxin, Yang

× Tongxin, Yang

en Tongxin, Yang

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Ryota, Shioya

× Ryota, Shioya

en Ryota, Shioya

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Hayato, Yamaki

× Hayato, Yamaki

en Hayato, Yamaki

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Hiroki, Honda

× Hiroki, Honda

en Hiroki, Honda

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論文抄録
内容記述タイプ Other
内容記述 CNFET (Carbon Nanotube Field Effect Transistor), which uses carbon nanotubes as transistor channels, is the next-generation MOSFET device and has a great potential in both improving the performance and reducing the power consumption of microprocessors. Due to high-speed switching and low power consumption, CNFET is expected to allow processor architects to adopt new microarchitecture in processor design; however, the nature of microprocessors implemented with CNFET (a.k.a., CNFET processors) is little known. In particular, performance, power consumption, and area of individual units within microprocessors placed-and-routed with CNFET have not been reported yet. In this paper, we show performance, power consumption, and area of two microprocessors (i.e., RSD and OpenSPARC T2) placed-and-routed with CNFET5 and CNFET7 technologies while comparing the experimental results with ASAP7, FreePDK15, and FreePDK45. Our experimental results show that processor units with CNFET7 consume up to 94.5% and 94.6% smaller power than those with ASAP7 at a frequency of 0.8 GHz in RSD and OpenSPARC T2 , respectively, in exchange for 2x area overheads, and CNFET5 that has the same area overhead as CNFET7 shows further reduction in power consumption when compared to CNFET7.
論文抄録(英)
内容記述タイプ Other
内容記述 CNFET (Carbon Nanotube Field Effect Transistor), which uses carbon nanotubes as transistor channels, is the next-generation MOSFET device and has a great potential in both improving the performance and reducing the power consumption of microprocessors. Due to high-speed switching and low power consumption, CNFET is expected to allow processor architects to adopt new microarchitecture in processor design; however, the nature of microprocessors implemented with CNFET (a.k.a., CNFET processors) is little known. In particular, performance, power consumption, and area of individual units within microprocessors placed-and-routed with CNFET have not been reported yet. In this paper, we show performance, power consumption, and area of two microprocessors (i.e., RSD and OpenSPARC T2) placed-and-routed with CNFET5 and CNFET7 technologies while comparing the experimental results with ASAP7, FreePDK15, and FreePDK45. Our experimental results show that processor units with CNFET7 consume up to 94.5% and 94.6% smaller power than those with ASAP7 at a frequency of 0.8 GHz in RSD and OpenSPARC T2 , respectively, in exchange for 2x area overheads, and CNFET5 that has the same area overhead as CNFET7 shows further reduction in power consumption when compared to CNFET7.
書誌レコードID
収録物識別子タイプ NCID
収録物識別子 AN10096105
書誌情報 研究報告システム・アーキテクチャ(ARC)

巻 2022-ARC-248, 号 5, p. 1-8, 発行日 2022-03-03
ISSN
収録物識別子タイプ ISSN
収録物識別子 2188-8574
Notice
SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc.
出版者
言語 ja
出版者 情報処理学会
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