Item type |
SIG Technical Reports(1) |
公開日 |
2018-02-28 |
タイトル |
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タイトル |
並列計算機におけるサーキットスイッチ・ネットワークの伝送遅延を最小化する方法 |
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言語 |
en |
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タイトル |
Minimizing Enci-to-end Latency in Circuit-switched Network for Parallel Computers |
言語 |
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言語 |
eng |
キーワード |
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主題Scheme |
Other |
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主題 |
ネットワーク・メモリ |
資源タイプ |
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資源タイプ識別子 |
http://purl.org/coar/resource_type/c_18gh |
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資源タイプ |
technical report |
著者所属 |
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国立情報学研究所アーキテクチャ科学研究系 |
著者所属 |
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国立情報学研究所アーキテクチャ科学研究系 |
著者所属 |
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国立情報学研究所アーキテクチャ科学研究系 |
著者所属(英) |
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en |
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Information Systems Architecture Science Research Division, National Institute of Informatics |
著者所属(英) |
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en |
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Information Systems Architecture Science Research Division, National Institute of Informatics |
著者所属(英) |
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en |
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Information Systems Architecture Science Research Division, National Institute of Informatics |
著者名 |
胡, 曜
平澤, 将一
鯉渕, 道紘
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著者名(英) |
Yao, Hu
Shoichi, Hirasawa
Michihiro, Koibuchi
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論文抄録 |
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内容記述タイプ |
Other |
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内容記述 |
Network congestion usually leads to long communication time in supercomputer and datacenter networks. In our previous study, we have proposed an electrical circuit-switched (ECS) network to avoid network congestion and guarantee a certain amount of bandwidth for each communication pair, which makes its end-to-end latency predictable. In this report, we discuss several methods to minimize end-to-end latency in our ECS network. Through numerical analysis, we get upper and lower bounds of the end-to-end latency for one communication in the network and infer conditions of the minimum end-to-end latency. We thus come up with two methods to reach or approach the minimum latency: routing update and sending time slot adjustment. Furthermore, we design a hybrid CS / PS switch which takes both advantages of circuit switching and packet switching and also helps to reduce the minimum necessary number of slots for each switch in the network. Evaluation results show that our ECS network can obtain large benefits from complement of a small packet switching component. |
論文抄録(英) |
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内容記述タイプ |
Other |
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内容記述 |
Network congestion usually leads to long communication time in supercomputer and datacenter networks. In our previous study, we have proposed an electrical circuit-switched (ECS) network to avoid network congestion and guarantee a certain amount of bandwidth for each communication pair, which makes its end-to-end latency predictable. In this report, we discuss several methods to minimize end-to-end latency in our ECS network. Through numerical analysis, we get upper and lower bounds of the end-to-end latency for one communication in the network and infer conditions of the minimum end-to-end latency. We thus come up with two methods to reach or approach the minimum latency: routing update and sending time slot adjustment. Furthermore, we design a hybrid CS / PS switch which takes both advantages of circuit switching and packet switching and also helps to reduce the minimum necessary number of slots for each switch in the network. Evaluation results show that our ECS network can obtain large benefits from complement of a small packet switching component. |
書誌レコードID |
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収録物識別子タイプ |
NCID |
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収録物識別子 |
AA11451459 |
書誌情報 |
研究報告システムとLSIの設計技術(SLDM)
巻 2018-SLDM-183,
号 17,
p. 1-6,
発行日 2018-02-28
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ISSN |
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収録物識別子タイプ |
ISSN |
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収録物識別子 |
2188-8639 |
Notice |
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SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc. |
出版者 |
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言語 |
ja |
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出版者 |
情報処理学会 |