Performance Evaluation of a Combination of the Parallel Bisection Method and the Block Inverse Iteration Method with Reorthogonalization for Eigenvalue Problems on MIC processor

• Item type: SIG Technical Reports(1)
• 公開日: 2017-07-10
• タイトル: Performance Evaluation of a Combination of the Parallel Bisection Method and the Block Inverse Iteration Method with Reorthogonalization for Eigenvalue Problems on MIC processor
• タイトル / 言語: en
• タイトル: Performance Evaluation of a Combination of the Parallel Bisection Method and the Block Inverse Iteration Method with Reorthogonalization for Eigenvalue Problems on MIC processor
• 言語: eng
• 資源タイプ / 資源タイプ識別子: http://purl.org/coar/resource_type/c_18gh
• 資源タイプ: technical report
• 著者所属: Graduate School of Informatics, Kyoto University
• 著者所属: Yahoo Japan Corporation
• 著者所属: Graduate School of Informatics, Kyoto University
• 著者所属: Graduate School of Informatics, Kyoto University
• 著者所属: Graduate School of Informatics, Kyoto University
• 著者所属(英): en
• 著者所属(英): Graduate School of Informatics, Kyoto University
• 著者所属(英): en
• 著者所属(英): Yahoo Japan Corporation
• 著者所属(英): en
• 著者所属(英): Graduate School of Informatics, Kyoto University
• 著者所属(英): en
• 著者所属(英): Graduate School of Informatics, Kyoto University
• 著者所属(英): en
• 著者所属(英): Graduate School of Informatics, Kyoto University
• 著者名: Sho, Araki; Hiroyuki, Ishigami; Masayuki, Osawa; Kinji, Kimura; Yoshimasa, Nakamura
• 著者名(英): Sho, Araki; Hiroyuki, Ishigami; Masayuki, Osawa; Kinji, Kimura; Yoshimasa, Nakamura
• 論文抄録 / 内容記述タイプ: Other
• 論文抄録 / 内容記述: We discuss the implementation, performance tuning, and evaluation of an eigensolver of real symmetric tridiagonal matrices using the bisection method and the block inverse iteration method with reorthogonalization on Intel Xeon Phi (Xeon Phi) many integrated core (MIC) processor. We develop an OpenMP thread parallel program for the eigensolver for Xeon Phi and experimentally determine the optimal block size parameter for both the MIC and CPU environments. Moreover, we perform experiments for evaluating the performance of the algorithm with the optimal block size. The eigensolver exhibits higher computation speed and accuracy in the MIC environment than the MRRR algorithm, which is known as the conventional high-speed eigensolver.
• 論文抄録(英) / 内容記述タイプ: Other
• 論文抄録(英) / 内容記述: We discuss the implementation, performance tuning, and evaluation of an eigensolver of real symmetric tridiagonal matrices using the bisection method and the block inverse iteration method with reorthogonalization on Intel Xeon Phi (Xeon Phi) many integrated core (MIC) processor. We develop an OpenMP thread parallel program for the eigensolver for Xeon Phi and experimentally determine the optimal block size parameter for both the MIC and CPU environments. Moreover, we perform experiments for evaluating the performance of the algorithm with the optimal block size. The eigensolver exhibits higher computation speed and accuracy in the MIC environment than the MRRR algorithm, which is known as the conventional high-speed eigensolver.
• 書誌レコードID / 収録物識別子タイプ: NCID
• 書誌レコードID / 収録物識別子: AN10505667
• 書誌情報: 研究報告数理モデル化と問題解決（MPS）; 巻 2017-MPS-114, 号 9, p. 1-4, 発行日 2017-07-10
• ISSN / 収録物識別子タイプ: ISSN
• ISSN / 収録物識別子: 2188-8833
• Notice: SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc.
• 出版者 / 言語: ja
• 出版者: 情報処理学会