{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00098528","sets":["581:7397:7450"]},"path":["7450"],"owner":"11","recid":"98528","title":["3次元交叉・突然変異を導入した3次元FPGA初期配置のための遺伝的アルゴリズム"],"pubdate":{"attribute_name":"公開日","attribute_value":"2014-02-15"},"_buckets":{"deposit":"c053c18e-e7a9-4d89-9b9f-bc48c2da050c"},"_deposit":{"id":"98528","pid":{"type":"depid","value":"98528","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"3次元交叉・突然変異を導入した3次元FPGA初期配置のための遺伝的アルゴリズム","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"3次元交叉・突然変異を導入した3次元FPGA初期配置のための遺伝的アルゴリズム"},{"subitem_title":"Genetic Algorithm for 3-D FPGA Initial Placement with 3-D Crossover and Mutation","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"[一般論文] 遺伝的アルゴリズム，3次元FPGA，初期配置","subitem_subject_scheme":"Other"}]},"item_type_id":"2","publish_date":"2014-02-15","item_2_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"広島工業大学工学部"},{"subitem_text_value":"広島工業大学大学院工学系研究科／現在，西日本旅客鉄道株式会社"}]},"item_2_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Faculty of Engineering, Hiroshima Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Engineering, Hiroshima Institute of Technology / Presently with West Japan Railway Company","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/98528/files/IPSJ-JNL5502052.pdf"},"date":[{"dateType":"Available","dateValue":"2016-02-15"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-JNL5502052.pdf","filesize":[{"value":"1.9 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"8"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"63c972d9-0851-4c91-be2a-05724bf63892","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2014 by the Information Processing Society of Japan"}]},"item_2_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"大村, 道郎"},{"creatorName":"太田, 雅也"}],"nameIdentifiers":[{}]}]},"item_2_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Michiroh, Ohmura","creatorNameLang":"en"},{"creatorName":"Masaya, Ohta","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_2_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00116647","subitem_source_identifier_type":"NCID"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_6501","resourcetype":"journal article"}]},"item_2_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"1882-7764","subitem_source_identifier_type":"ISSN"}]},"item_2_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年の大規模集積回路における製造技術の進歩にともない，TSVを用いた3次元VLSI設計が注目を集めている．TSVを使う方法では，1つのLSIに1,000本以上のTSVを使い配線することができるため，3次元に適したアルゴリズムから開発する必要がある．VLSIのレイアウト設計は，配置設計と配線設計に分かれ，その最初の段階に初期配置設計がある．本論文では3次元VLSIの中でも特に3次元FPGA初期配置について議論する．ところで，一般的に様々な最適化問題に対し，効率良く準最適解を求めるアルゴリズムの1つに，遺伝的アルゴリズムがあり，マクロセルを含む3次元FPGAの初期配置に対してもそのまま拡張できる．しかし1次元の遺伝子列（個体）で3次元の配置を表し，1次元配列を対象とした通常の遺伝的操作を行うと，配置構造が簡単に壊れて配線長の総和が小さい配置を得られない可能性がある．本論文では，マクロセルを考慮した3次元FPGA初期配置問題に対し，遺伝子に3次元構造を持たせ，3次元交叉，3次元突然変異を導入した，3次元FPGA初期配置のための遺伝的アルゴリズムを提案する．実験の結果，提案手法では立方体の配置領域に対し，順序交叉，交換突然変異を単純に適用した場合に比べ，平均24.4%配線長の総和が小さい配置を高速に得ることができた．また配置領域を直方体とした場合でも，従来手法に対し19.3%配線長の総和が小さい配置を高速に得ることができた．","subitem_description_type":"Other"}]},"item_2_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"As manufacturing technology has advanced in recent years, 3-D VLSI with TSV has been the focus of attention. Because more than 1,000 TSV can be used to design a 3-D VLSI, we need 3-D layout algorithms. VLSI layout design consists of placement and routing, and initial placement is the first stage of this placement. In this paper, initial placement of 3-D FPGA, which is a kind of 3-D VLSI, is discussed. In general, a genetic algorithm is one of the most effective methods for a variety of optimization problem, and it can be applied to the 3-D FPGA initial placement problem with macro cell. Usually, the chromosome is represented by a one dimensional array, and if a 3-D placement region is represented by this chromosome, relative positions of modules are easily broken by the crossover. In this paper, we propose a genetic algorithm with 3-D crossover and mutation, in which the chromosome has 3-dimensional structure. The experimental results show that our approach achieves 24.4% shorter wire length for cube placement regions, and 19.3% shorter wire length for rectangular solid placement regions. In this paper, our proposed method and the experimental results are shown.","subitem_description_type":"Other"}]},"item_2_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"1068","bibliographic_titles":[{"bibliographic_title":"情報処理学会論文誌"}],"bibliographicPageStart":"1059","bibliographicIssueDates":{"bibliographicIssueDate":"2014-02-15","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"2","bibliographicVolumeNumber":"55"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"updated":"2025-01-21T12:25:45.203301+00:00","created":"2025-01-18T23:44:45.493800+00:00","links":{},"id":98528}