{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00098118","sets":["1164:2036:7423:7424"]},"path":["7424"],"owner":"11","recid":"98118","title":["ストリーム計算のための高位合成コンパイラの設計と実装"],"pubdate":{"attribute_name":"公開日","attribute_value":"2014-01-21"},"_buckets":{"deposit":"a17e7cc3-c162-4356-b0d6-b5df68ecf2be"},"_deposit":{"id":"98118","pid":{"type":"depid","value":"98118","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"ストリーム計算のための高位合成コンパイラの設計と実装","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"ストリーム計算のための高位合成コンパイラの設計と実装"},{"subitem_title":"Design and Implementation of High-Level Synthesis Compiler for Stream Computation","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"FPGA高位合成","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2014-01-21","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東北大学大学院情報科学研究科"},{"subitem_text_value":"東北大学大学院情報科学研究科"},{"subitem_text_value":"東北大学大学院情報科学研究科"},{"subitem_text_value":"東北大学大学院情報科学研究科"},{"subitem_text_value":"東北大学大学院情報科学研究科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Information Sciences, Tohoku University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Sciences, Tohoku University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Sciences, Tohoku University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Sciences, Tohoku University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Sciences, Tohoku University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/98118/files/IPSJ-SLDM14164001.pdf"},"date":[{"dateType":"Available","dateValue":"2100-01-01"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM14164001.pdf","filesize":[{"value":"426.3 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"2148835a-1965-43ca-8b49-501383bb5cfe","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2014 by the Institute of Electronics, Information and Communication Engineers\nThis SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"伊藤, 涼"},{"creatorName":"鈴木, 隼人"},{"creatorName":"千葉, 諒太郎"},{"creatorName":"佐野, 健太郎"},{"creatorName":"山本, 悟"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Ryo, Ito","creatorNameLang":"en"},{"creatorName":"Hayato, Suzuki","creatorNameLang":"en"},{"creatorName":"Ryotaro, Chiba","creatorNameLang":"en"},{"creatorName":"Kentaro, Sano","creatorNameLang":"en"},{"creatorName":"Satoru, Yamamoto","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年の FPGA の応用範囲の拡大に伴い，抽象度の高い言語によってハードウェア設計を行う高位合成技術の研究が重要性を増しつつある．本研究室では，FPGA を用いたストリーム計算専用計算機の開発を行ってきたが，回路規模の大規模化により，アルゴリズム設計からハードウェア実装までの時間短縮による生産性の向上が強く望まれている．そこで，本研究では，特定の数値計算問題に特化したストリーム計算回路を自動生成するコンパイラ (Stream Processor Generator, SPGen) を提案する．本論文では，SPGen の目的および要求仕様を説明した後に，その実装について述べる．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"High-level synthesis (HLS) has been getting more and more important as FPGAs are more widely used for various applications. Productivity improvement is now strongly demanded so that we can reduce time from algorithm design to hardware implementation, particularly, in the development of our custom stream computing processor with FPGAs. To obtain higher productivity, we propose an HLS compiler, a stream processor generator (SPGen), which generates HDL codes for stream computation with given equations. In this paper, we describe purpose, requirements, and implementation of SPGen.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2014-01-21","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"1","bibliographicVolumeNumber":"2014-SLDM-164"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"id":98118,"updated":"2025-01-21T12:36:23.466209+00:00","links":{},"created":"2025-01-18T23:44:25.908348+00:00"}