{"updated":"2025-01-21T12:41:47.747500+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00097956","sets":["1164:1579:7406:7407"]},"path":["7407"],"owner":"11","recid":"97956","title":["共有変数に対する複合操作を排他実行するハードウェアトランザクショナルメモリの改良"],"pubdate":{"attribute_name":"公開日","attribute_value":"2014-01-16"},"_buckets":{"deposit":"df081f5e-9bdc-42bc-acec-1a775245de19"},"_deposit":{"id":"97956","pid":{"type":"depid","value":"97956","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"共有変数に対する複合操作を排他実行するハードウェアトランザクショナルメモリの改良","author_link":["0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"共有変数に対する複合操作を排他実行するハードウェアトランザクショナルメモリの改良"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"マルチコア・メニーコア","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2014-01-16","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Nagoya Institute of Technology","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/97956/files/IPSJ-ARC14208022.pdf"},"date":[{"dateType":"Available","dateValue":"2016-01-16"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC14208022.pdf","filesize":[{"value":"1.1 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"52229ccc-ff87-4110-88a5-fadb13cbee65","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2014 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"橋本高志良"},{"creatorName":"井出源基"},{"creatorName":"山田遼平"},{"creatorName":"堀場匠一朗"},{"creatorName":"津邑公暁"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"マルチコア環境では，一般的にロックを用いて共有変数へのアクセスを調停する．しかし，ロックには並列性の低下やデッドロックの発生などの問題があるため，これに代わる並行性制御機構としてトランザクショナルメモリが提案されている．この機構のハードウェア実装であるハードウェアトランザクショナルメモリ （HTM） では，アクセス競合が発生しない限りトランザクションが投機的に実行される．しかし，共有変数に対する複合操作が行われるようなトランザクションが並行実行された場合，その際に発生するストールが完全に無駄となる場合がある．本稿では，このような同一の共有変数に対する Read→Write の順序でのアクセスを検出し，それに関与するトランザクションを排他実行することで，HTM の全体性能を向上させる手法を提案する．シミュレーションによる評価の結果，提案手法により 16 スレッド実行時において最大 72.2%，平均 17.5%の性能向上を達成した．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"8","bibliographic_titles":[{"bibliographic_title":"研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2014-01-16","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"22","bibliographicVolumeNumber":"2014-ARC-208"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"created":"2025-01-18T23:44:17.962850+00:00","id":97956,"links":{}}