{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00096083","sets":["1164:2036:6976:7313"]},"path":["7313"],"owner":"11","recid":"96083","title":["［招待講演］縦横方向結合共振を用いた三次元クロック分配技術"],"pubdate":{"attribute_name":"公開日","attribute_value":"2013-11-20"},"_buckets":{"deposit":"6dde57f2-15b1-466c-b773-4fcb31f3bdf1"},"_deposit":{"id":"96083","pid":{"type":"depid","value":"96083","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"［招待講演］縦横方向結合共振を用いた三次元クロック分配技術","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"［招待講演］縦横方向結合共振を用いた三次元クロック分配技術"},{"subitem_title":"[Invited]3D Clock Distribution Using Vertically/Horizontally Coupled Resonators","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"3次元集積回路・実装技術，招待講演","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2013-11-20","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"慶應義塾大学理工学部電子工学科"},{"subitem_text_value":"慶應義塾大学理工学部電子工学科"},{"subitem_text_value":"慶應義塾大学理工学部電子工学科"},{"subitem_text_value":"慶應義塾大学理工学部電子工学科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Department of Electronics and Electrical Engineering, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Department of Electronics and Electrical Engineering, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Department of Electronics and Electrical Engineering, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Department of Electronics and Electrical Engineering, Keio University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/96083/files/IPSJ-SLDM13163018.pdf"},"date":[{"dateType":"Available","dateValue":"2100-01-01"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM13163018.pdf","filesize":[{"value":"770.0 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"e1869163-b5c2-4b46-b1c5-c3fefed95c05","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2013 by the Institute of Electronics, Information and Communication Engineers\nThis SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"竹, 康宏"},{"creatorName":"三浦, 典之"},{"creatorName":"石黒, 仁揮"},{"creatorName":"黒田, 忠広"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Yasuhiro, Take","creatorNameLang":"en"},{"creatorName":"Noriyuki, Miura","creatorNameLang":"en"},{"creatorName":"Hiroki, Ishikuro","creatorNameLang":"en"},{"creatorName":"Tadahiro, Kuroda","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"世界で初めて、外部参照クロックと同期可能な三次元積層チップ間クロック分配を実現した。垂直方向 (積層チップ間) はコイル誘導結合による LC 結合共振器で、水平方向 (チップ面内) は分散したリングオシレータの出力を短絡させた結合共振器で､三次元にクロックを分配する。0.18μm CMOS で積層テストチップの測定結果では、1.1GHｚ のクロック分配において、1.8Ｖ の電源電圧で 18ps 以下、0.9Ｖ の電源電圧で 25ps 以下のスキューを達成した。RMS　ジッタは 1.72ps 以下であり、提案した周波数ロック/位相引き込み方式は、ロックレンジを±10％ に拡張した。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"A 1.1-GHz clock is distributed across stacked chips for the first time. It utilizes vertically coupled LC oscillators and horizontally coupled ring oscillators. Clock skew is less than 18- and 25- ps under a 1.8- and 0.9- V supply, and RMS jitter is smaller than 1.72 ps. The proposed frequency-locking and phase-pulling scheme widens the lock range to +/-10%.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"4","bibliographic_titles":[{"bibliographic_title":"研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2013-11-20","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"18","bibliographicVolumeNumber":"2013-SLDM-163"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"id":96083,"updated":"2025-01-21T13:26:46.881262+00:00","links":{},"created":"2025-01-18T23:43:02.027341+00:00"}