@techreport{oai:ipsj.ixsq.nii.ac.jp:00096073,
 author = {五十嵐, 博昭 and 史, 又華 and 柳澤, 政生 and 戸川, 望 and Hiroaki, Igarashi and Youhua, Shi and Masao, Yanagisawa and Nozomu, Togawa},
 issue = {8},
 month = {Nov},
 note = {プロセス技術の微細化により LSI のタイミング設計が難しくなっており，タイミングエラー対策手法の重要性が高まっている．既存のタイミングエラー検出手法はエラー訂正に再実行が必要であったり，複雑な構造を持つためタイミング設計が難しい我々はより訂正コストが小さく簡単な構造を持つタイミングエラー対策手法として STEP を提案している．STEP ではチェックポイントと呼ばれるパス中の観測点をチェックすることでタイミングエラー発生の可能性を検出する．STEP はタイミングエラー予測手法であるため誤検出が発生し，誤検出の削減が大きな課題である．本稿ではチェックポイントの最適化により誤検出を削減する手法を提案する．実験結果より，動作可能周波数が最大で 24 倍となり，スループットは最大で約 45％向上した．, Due to advance process technologies, timing design of LSIs has become more difficult and the importance of timing error countermeasure techniques is increasing as well. Existing timing error detection/correction methods have difficulties in timing design since they have complex structure. Furthermore, their error correction is realized by re-run operation which results in low throughput. We have proposed a suspicious timing error prediction method (STEP method) which predicts timing error and corrects it with simple structure. STEP is based on checking timing errors by observing several checkpoints on signal paths. Since STEP is a timing error prediction method, we may have false positives and reduction of them is one of the largest problems. In this paper, we propose a method to reduce the false positives to optimize the checkpoints. The experimental results show that an operational frequency is increased by up to 2.4 times and its throughput is improved by up to 45%.},
 title = {チェックポイント観測によるタイミングエラー予測手法},
 year = {2013}
}