{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00009599","sets":["581:586:595"]},"path":["595"],"owner":"1","recid":"9599","title":["FPGAベースオンチップマルチプロセッサにおける同期付きキャッシュメモリの実装と評価"],"pubdate":{"attribute_name":"公開日","attribute_value":"2008-04-15"},"_buckets":{"deposit":"0b5b0aed-2f78-4510-b0c3-9c35a349317a"},"_deposit":{"id":"9599","pid":{"type":"depid","value":"9599","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"FPGAベースオンチップマルチプロセッサにおける同期付きキャッシュメモリの実装と評価","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"FPGAベースオンチップマルチプロセッサにおける同期付きキャッシュメモリの実装と評価"},{"subitem_title":"An Implementation and Evaluation of Snoop Cache with Synchronization on an FPGA Based Multiprocessor","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"一般論文","subitem_subject_scheme":"Other"}]},"item_type_id":"2","publish_date":"2008-04-15","item_2_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"九州工業大学工学部"},{"subitem_text_value":"九州工業大学工学部"}]},"item_2_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Faculty of Engineering, Kyushu Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Faculty of Engineering, Kyushu Institute of Technology","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/9599/files/IPSJ-JNL4904017.pdf"},"date":[{"dateType":"Available","dateValue":"2010-04-15"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-JNL4904017.pdf","filesize":[{"value":"875.3 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"8"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"85017a02-f84e-4d01-b03a-4f5505d123d9","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2008 by the Information Processing Society of Japan"}]},"item_2_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"山脇, 彰"},{"creatorName":"岩根, 雅彦"}],"nameIdentifiers":[{}]}]},"item_2_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Akira, Yamawaki","creatorNameLang":"en"},{"creatorName":"Masahiko, Iwane","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_2_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN00116647","subitem_source_identifier_type":"NCID"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_6501","resourcetype":"journal article"}]},"item_2_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"1882-7764","subitem_source_identifier_type":"ISSN"}]},"item_2_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"FPGA ベースのオンチップマルチプロセッサ（FOMP）は，開発コストを削減しながら要求性能を達成しうるフルプログラマブルなオンチップマルチプロセッサである．本論文では，そのようなFOMP において共有変数を介した低オーバヘッドな同期通信を実現するために，既存のスヌープキャッシュをTSVM（Tagged Shared Variable Memory）キャッシュに拡張し，それによって生じるハードウェアオーバヘッドと消費電力への影響を明らかにする．実験から，拡張にともなった回路規模の増加は5%，動作速度の低下は2%であり，大きな影響なくTSVM キャッシュ化できることが確認された．さらに，TSVM キャッシュは電力性能比を1.22 倍～2.56 倍に改善できることも確認された．","subitem_description_type":"Other"}]},"item_2_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"FPGA based on-chip multiprocessor (FOMP) is an on-chip multiprocessor with fully programmable feature which can reduce development cost and achieve performance requirement. In order to provide an FOMP with the low-overhead communication and synchronization methods via shared variables, this paper attempts to introduce the TSVM (Tagged Shared Variable Memory) cache to a snooping cache on the FOMP. The TSVM cache can improve a performance by combining communication and synchronization with the coherence maintenance. Using an FPGA, we have evaluated how extending a conventional snooping cache affects circuitries and clock speed. As a result, the growth of hardware amount and the degradation of clock speed are only 5% and 2% respectively. It is also confirmed that the TSVM cache improves performance and energy efficiency.","subitem_description_type":"Other"}]},"item_2_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"1668","bibliographic_titles":[{"bibliographic_title":"情報処理学会論文誌"}],"bibliographicPageStart":"1657","bibliographicIssueDates":{"bibliographicIssueDate":"2008-04-15","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"4","bibliographicVolumeNumber":"49"}]},"relation_version_is_last":true,"item_2_alternative_title_2":{"attribute_name":"その他タイトル","attribute_value_mlt":[{"subitem_alternative_title":"計算機システム化技術"}]},"weko_creator_id":"1"},"id":9599,"updated":"2025-01-23T03:19:49.734854+00:00","links":{},"created":"2025-01-18T22:44:46.348637+00:00"}