{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00095336","sets":["1164:2036:6976:7275"]},"path":["7275"],"owner":"11","recid":"95336","title":["2相ハンドシェイクプロトコル非同期式回路向けマルチクロック・マルチエッジトリガ・フリップフロップの提案"],"pubdate":{"attribute_name":"公開日","attribute_value":"2013-09-30"},"_buckets":{"deposit":"724f9905-3b1a-42d7-b5cc-90e275b1017c"},"_deposit":{"id":"95336","pid":{"type":"depid","value":"95336","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"2相ハンドシェイクプロトコル非同期式回路向けマルチクロック・マルチエッジトリガ・フリップフロップの提案","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"2相ハンドシェイクプロトコル非同期式回路向けマルチクロック・マルチエッジトリガ・フリップフロップの提案"},{"subitem_title":"Proposal of Double-clock and Dual-Edge-Triggered Flip-flops for Asynchronous Circuits","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2013-09-30","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"弘前大学"},{"subitem_text_value":"国立情報学研究所"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Hirosaki Unversity","subitem_text_language":"en"},{"subitem_text_value":"National Institute of Informatics","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/95336/files/IPSJ-SLDM13162002.pdf","label":"IPSJ-SLDM13162002"},"date":[{"dateType":"Available","dateValue":"2100-01-01"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM13162002.pdf","filesize":[{"value":"645.7 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"59bc0967-c2ce-4435-958a-aabb4cc60785","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2013 by the Institute of Electronics, Information and Communication Engineers\nThis SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"今井, 雅"},{"creatorName":"米田, 友洋"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Masashi, Imai","creatorNameLang":"en"},{"creatorName":"Tomohiro, Yoneda","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"要求-応答ハンドシェイクに基づいて動作する非同期式回路の代表的なハンドシェイクプロトコルには 2 相と 4 相がある。2 相は初期化のオーバーヘッドがないが、遷移論理であるため回路の実現が複雑になりやすい。本稿では 2 相ハンドシェイクプロトコルに基づく制御回路の実現を容易にするマルチクロック・マルチエッジトリガ・フリップフロップを提案する。提案したフリップフロップを用いると、2 相ハンドシェイク信号を直接扱うことができ、制御回路を容易に設計することができる。本稿では PTM 22nm HP プロセステクノロジを用いて回路単体の性能と実回路に適用した結果を示す。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"There are mainly two types of handshaking protocols in asynchronous circuit design; 2-phase hand shaking protocol and 4-phase handshaking protocol. It may be difficult to implement the 2-phase handshaking circuits since they are based on the transition signaling, while they have no return-to-zero overhead. This paper proposes double-clock and dual-edge-triggered flip-flops for designing simple control circuits based on the two-phase handshaking protocol. They can directly deal with the two-phase handshaking signals, resulting in simple control circuits. The performance and the design constraints of the proposed flip-flops have been evaluated using the PTM 22nm HP device parameters.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2013-09-30","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"2","bibliographicVolumeNumber":"2013-SLDM-162"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"id":95336,"updated":"2025-01-21T13:34:22.941394+00:00","links":{},"created":"2025-01-18T23:42:27.245914+00:00"}