{"id":94559,"updated":"2025-01-21T14:32:25.119662+00:00","links":{},"created":"2025-01-18T23:41:50.921726+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00094559","sets":["1164:1579:7041:7232"]},"path":["7232"],"owner":"11","recid":"94559","title":["もしILPプロセッサのレジスタファイルが分散キーバリューストアになったら"],"pubdate":{"attribute_name":"公開日","attribute_value":"2013-07-24"},"_buckets":{"deposit":"327bc08f-e2de-43e4-afc4-d3b3c825376a"},"_deposit":{"id":"94559","pid":{"type":"depid","value":"94559","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"もしILPプロセッサのレジスタファイルが分散キーバリューストアになったら","author_link":["0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"もしILPプロセッサのレジスタファイルが分散キーバリューストアになったら"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"レジスタ","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2013-07-24","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"電気通信大学情報システム学研究科"},{"subitem_text_value":"電気通信大学情報システム学研究科"},{"subitem_text_value":"電気通信大学情報システム学研究科"},{"subitem_text_value":"電気通信大学情報システム学研究科"},{"subitem_text_value":"電気通信大学情報システム学研究科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Information Systems, The University of Electro-Communications","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Systems, The University of Electro-Communications","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Systems, The University of Electro-Communications","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Systems, The University of Electro-Communications","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Systems, The University of Electro-Communications","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/94559/files/IPSJ-ARC13206005.pdf"},"date":[{"dateType":"Available","dateValue":"2015-07-24"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC13206005.pdf","filesize":[{"value":"3.5 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"f4cbb8f4-ea0c-426b-a1ce-ee1a3ae3ff32","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2013 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"入江英嗣"},{"creatorName":"山中崇弘"},{"creatorName":"佐保田誠"},{"creatorName":"吉見真聡"},{"creatorName":"吉永努"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"プロセッサの性能向上の基本戦略は，2000 年頃からはマルチコア構成の拡張が主流となり，トランジスタ資源をコア数の増加に利用することで，効率的に TLP 性能を向上させてきた．しかしこのアプローチも，TLP の収穫逓減やダークシリコンの増加など，継続的な成長には限界が指摘されている．この限界を打ち破り，高性能なメニーコアプロセッサを実現するための課題の一つとして，一つ一つのコアの実行性能と電力効率の双方を高める実行アーキテクチャの開発が挙げられる．ここではピーク ILP 実行幅よりも，コンスタントな高性能と高効率が求められる．3 次元実装技術に代表されるように，パッケージ内トランジスタ数の増加は堅調であり，容量を用いて処理レイテンシと電力を削減するアーキテクチャへの転換が今後のプロセッサ成長の鍵と考えられる．本論文では，ライト・ワンス・マナーに基づいた大きな論理レジスタ空間を導入することで，レジスタリネーミング処理を取り除き，更にはバックエンド幅の増加なく実行性能を増加させる STRAIHGT アーキテクチャを提案し，実現のための技術と性能の見積もりを述べる．STRAIGHT アーキテクチャに見立てたパラメタを用いた初期評価では，同じワークロードに対するエネルギー消費を 12% 削減しながら，同時に約 30% の IPC 向上が得られ，性能/パワー比を改善する新しい実行方式として有効であることが示された．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"10","bibliographic_titles":[{"bibliographic_title":"研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2013-07-24","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"5","bibliographicVolumeNumber":"2013-ARC-206"}]},"relation_version_is_last":true,"weko_creator_id":"11"}}