{"updated":"2025-01-21T15:38:41.930893+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00091284","sets":["1164:1579:7041:7132"]},"path":["7132"],"owner":"11","recid":"91284","title":["GPUにおける細粒度パワーゲーティング向けスレッド発行制御手法の検討"],"pubdate":{"attribute_name":"公開日","attribute_value":"2013-03-19"},"_buckets":{"deposit":"73555846-a9ec-4c44-9093-a4ab6359ccde"},"_deposit":{"id":"91284","pid":{"type":"depid","value":"91284","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"GPUにおける細粒度パワーゲーティング向けスレッド発行制御手法の検討","author_link":["0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"GPUにおける細粒度パワーゲーティング向けスレッド発行制御手法の検討"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"アクセラレータ","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2013-03-19","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"電気通信大学大学院情報システム学研究科"},{"subitem_text_value":"電気通信大学大学院情報システム学研究科"},{"subitem_text_value":"電気通信大学大学院情報システム学研究科"},{"subitem_text_value":"電気通信大学大学院情報システム学研究科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Information Systems, The University of Electro-Communications","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Systems, The University of Electro-Communications","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Systems, The University of Electro-Communications","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Systems, The University of Electro-Communications","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/91284/files/IPSJ-ARC13204002.pdf"},"date":[{"dateType":"Available","dateValue":"2015-03-19"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC13204002.pdf","filesize":[{"value":"660.0 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"76294c2c-ed68-4b0a-bc2d-693542407823","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2013 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"松本洋平"},{"creatorName":"近藤正章"},{"creatorName":"和田康孝"},{"creatorName":"本多弘樹"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年では GPU の消費電力の増加が問題となっている．本稿では GPU に搭載された SIMD 演算器のリーク電力の削減手法として細粒度パワーゲーティングを適応することを考え，その際のリーク電力削減効果を向上させるためのスレッド発行制御手法を提案する．前提とする細粒度パワーゲーティングでは GPU の SIMD の各演算器単位で電源の供給を制御する．提案手法では，電源の ON/OFF によるスリープモードとアクティブモードの移行時に生じる電力的なオーバーヘッド抑えるために，各ワープ内のスレッドの発行制御を行うものである．スレッド発行制御手法としては一部の演算器に集約してスレッド実行を行うスレッドコンパクション，1warp を 2 つの warp に分割する warp 分割を検討する．シミュレーションによる初期評価の結果，スレッドコンパクション，および warp 分割を適用した場合のリークエネルギー削減率はそれぞれ 46%，71% になった．また両者を組み合わせた場合のリーク電力削減率は 74% になることがわかった．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"7","bibliographic_titles":[{"bibliographic_title":"研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2013-03-19","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"2","bibliographicVolumeNumber":"2013-ARC-204"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"created":"2025-01-18T23:40:35.493982+00:00","id":91284,"links":{}}