@article{oai:ipsj.ixsq.nii.ac.jp:00090523,
 author = {Kosuke, Mizuno and Yosuke, Terachi and Kenta, Takagi and Shintaro, Izumi and Hiroshi, Kawaguchi and Masahiko, Yoshimoto and Kosuke, Mizuno and Yosuke, Terachi and Kenta, Takagi and Shintaro, Izumi and Hiroshi, Kawaguchi and Masahiko, Yoshimoto},
 journal = {IPSJ Transactions on System LSI Design Methodology（TSLDM）},
 month = {Feb},
 note = {This paper describes a Histogram of Oriented Gradients (HOG)-based object detection processor. It features a simplified HOG algorithm with cell-based scanning and simultaneous Support Vector Machine (SVM) calculation, cell-based pipeline architecture, and parallelized modules. To evaluate the effectiveness of our approach, the proposed architecture is implemented onto a FPGA prototyping board. Results show that the proposed architecture can generate HOG features and detect objects with 40MHz for SVGA resolution video (800 × 600pixels) at 72 frames per second (fps)., This paper describes a Histogram of Oriented Gradients (HOG)-based object detection processor. It features a simplified HOG algorithm with cell-based scanning and simultaneous Support Vector Machine (SVM) calculation, cell-based pipeline architecture, and parallelized modules. To evaluate the effectiveness of our approach, the proposed architecture is implemented onto a FPGA prototyping board. Results show that the proposed architecture can generate HOG features and detect objects with 40MHz for SVGA resolution video (800 × 600pixels) at 72 frames per second (fps).},
 pages = {42--51},
 title = {An FPGA Implementation of a HOG-based Object Detection Processor},
 volume = {6},
 year = {2013}
}