An FPGA Implementation of a HOG-based Object Detection Processor

• Item type: Trans(1)
• 公開日: 2013-02-15
• タイトル: An FPGA Implementation of a HOG-based Object Detection Processor
• タイトル / 言語: en
• タイトル: An FPGA Implementation of a HOG-based Object Detection Processor
• 言語: eng
• キーワード / 主題Scheme: Other
• キーワード / 主題: [Architectural Design] image recognition, histograms of oriented gradients, support vector machine, hardware implementation
• 資源タイプ / 資源タイプ識別子: http://purl.org/coar/resource_type/c_6501
• 資源タイプ: journal article
• 著者所属: Graduate School of Engineering, Kobe University
• 著者所属: Graduate School of Engineering, Kobe University
• 著者所属: Graduate School of Engineering, Kobe University
• 著者所属: Graduate School of Engineering, Kobe University
• 著者所属: Graduate School of Engineering, Kobe University
• 著者所属: Graduate School of Engineering, Kobe University
• 著者所属(英): en
• 著者所属(英): Graduate School of Engineering, Kobe University
• 著者所属(英): en
• 著者所属(英): Graduate School of Engineering, Kobe University
• 著者所属(英): en
• 著者所属(英): Graduate School of Engineering, Kobe University
• 著者所属(英): en
• 著者所属(英): Graduate School of Engineering, Kobe University
• 著者所属(英): en
• 著者所属(英): Graduate School of Engineering, Kobe University
• 著者所属(英): en
• 著者所属(英): Graduate School of Engineering, Kobe University
• 著者名: Kosuke, Mizuno; Yosuke, Terachi; Kenta, Takagi; Shintaro, Izumi; Hiroshi, Kawaguchi; Masahiko, Yoshimoto
• 著者名(英): Kosuke, Mizuno; Yosuke, Terachi; Kenta, Takagi; Shintaro, Izumi; Hiroshi, Kawaguchi; Masahiko, Yoshimoto
• 論文抄録 / 内容記述タイプ: Other
• 論文抄録 / 内容記述: This paper describes a Histogram of Oriented Gradients (HOG)-based object detection processor. It features a simplified HOG algorithm with cell-based scanning and simultaneous Support Vector Machine (SVM) calculation, cell-based pipeline architecture, and parallelized modules. To evaluate the effectiveness of our approach, the proposed architecture is implemented onto a FPGA prototyping board. Results show that the proposed architecture can generate HOG features and detect objects with 40MHz for SVGA resolution video (800 × 600pixels) at 72 frames per second (fps).
• 論文抄録(英) / 内容記述タイプ: Other
• 論文抄録(英) / 内容記述: This paper describes a Histogram of Oriented Gradients (HOG)-based object detection processor. It features a simplified HOG algorithm with cell-based scanning and simultaneous Support Vector Machine (SVM) calculation, cell-based pipeline architecture, and parallelized modules. To evaluate the effectiveness of our approach, the proposed architecture is implemented onto a FPGA prototyping board. Results show that the proposed architecture can generate HOG features and detect objects with 40MHz for SVGA resolution video (800 × 600pixels) at 72 frames per second (fps).
• 書誌情報: IPSJ Transactions on System LSI Design Methodology（TSLDM）; 巻 6, p. 42-51, 発行日 2013-02-15
• ISSN / 収録物識別子タイプ: ISSN
• ISSN / 収録物識別子: 1882-6687
• 出版者 / 言語: ja
• 出版者: 情報処理学会