{"created":"2025-01-18T23:38:31.495030+00:00","updated":"2025-01-21T16:58:51.616805+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00087948","sets":["1164:2036:6976:6977"]},"path":["6977"],"owner":"11","recid":"87948","title":["AllianceEDAツールセットとディープサブミクロンプロセス対応λルールベースセルライブラリによるRohm0.18μｍチップ試作検証 配置配線ツールの試行"],"pubdate":{"attribute_name":"公開日","attribute_value":"2013-01-09"},"_buckets":{"deposit":"73bbd529-f66e-46dd-bfe0-63e4b4cc8fab"},"_deposit":{"id":"87948","pid":{"type":"depid","value":"87948","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"AllianceEDAツールセットとディープサブミクロンプロセス対応λルールベースセルライブラリによるRohm0.18μｍチップ試作検証 配置配線ツールの試行","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"AllianceEDAツールセットとディープサブミクロンプロセス対応λルールベースセルライブラリによるRohm0.18μｍチップ試作検証 配置配線ツールの試行"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"物理設計","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2013-01-09","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東海大学"},{"subitem_text_value":"東海大学"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Tokai Univ","subitem_text_language":"en"},{"subitem_text_value":"Tokai Univ","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/87948/files/IPSJ-SLDM13159016.pdf"},"date":[{"dateType":"Available","dateValue":"2100-01-01"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM13159016.pdf","filesize":[{"value":"2.0 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"3a5453df-6d90-4489-becc-404c5d1cf990","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2013 by the Institute of Electronics, Information and Communication Engineers\nThis SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"細川, 達也"},{"creatorName":"清水, 尚彦"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Tatsuya, Hosokawa","creatorNameLang":"en"},{"creatorName":"Naohiko, Shimizu","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"我々はこれまでにオープンソース EDA とラムダベースセルライブラリとを用いたチップ設計フローを開発し、チップを試作した。しかし、チップ面積が大きくなるため、新たなセルライブラリを用いる設計フローを新規開発し、プロセスルールを満足するチップレイアウトを設計できるようにした。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"We have developed chip design flow using open source EDA tool-set and Arule based cell library and succeed trial manufacture. However, area of chip designed by the flow is too large. Therefore we develop new chip design flow that can satisfy process rule.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2013-01-09","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"16","bibliographicVolumeNumber":"2013-SLDM-159"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"id":87948,"links":{}}