{"updated":"2025-01-21T19:50:39.392581+00:00","links":{},"id":80351,"created":"2025-01-18T23:34:50.722291+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00080351","sets":["934:1119:6676:6677"]},"path":["6677"],"owner":"11","recid":"80351","title":["3次元積層LSI向けSRAM/DRAMハイブリッドキャッシュ・アーキテクチャ"],"pubdate":{"attribute_name":"公開日","attribute_value":"2012-01-27"},"_buckets":{"deposit":"1cee89db-a7ee-419d-9459-d650ecd5f949"},"_deposit":{"id":"80351","pid":{"type":"depid","value":"80351","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"3次元積層LSI向けSRAM/DRAMハイブリッドキャッシュ・アーキテクチャ","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"3次元積層LSI向けSRAM/DRAMハイブリッドキャッシュ・アーキテクチャ"},{"subitem_title":"SRAM/DRAM Hybrid Cache Architecture for Three-dimensional Integrated Circuits","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"プロセッサアーキテクチャ","subitem_subject_scheme":"Other"}]},"item_type_id":"3","publish_date":"2012-01-27","item_3_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"九州大学大学院システム情報科学府"},{"subitem_text_value":"九州大学大学院システム情報科学府／現在，富士通株式会社"},{"subitem_text_value":"九州大学大学院システム情報科学府"},{"subitem_text_value":"九州大学大学院システム情報科学研究院"},{"subitem_text_value":"九州大学大学院システム情報科学研究院"}]},"item_3_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Information Science and Electrical Engineering, Kyushu University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Science and Electrical Engineering, Kyushu University / Presently with Fujitsu Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Science and Electrical Engineering, Kyushu University","subitem_text_language":"en"},{"subitem_text_value":"Faculty of Information Science and Electrical Engineering, Kyushu University","subitem_text_language":"en"},{"subitem_text_value":"Faculty of Information Science and Electrical Engineering, Kyushu University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/80351/files/IPSJ-TACS0501005.pdf"},"date":[{"dateType":"Available","dateValue":"2014-01-27"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-TACS0501005.pdf","filesize":[{"value":"1.7 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"11"},{"tax":["include_tax"],"price":"0","billingrole":"14"},{"tax":["include_tax"],"price":"0","billingrole":"15"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"52569611-8236-4714-92ea-4c8ff79e06d7","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2012 by the Information Processing Society of Japan"}]},"item_3_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"上野, 伸也"},{"creatorName":"橋口, 慎哉"},{"creatorName":"福本, 尚人"},{"creatorName":"井上, 弘士"},{"creatorName":"村上, 和彰"}],"nameIdentifiers":[{}]}]},"item_3_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Shinya, Ueno","creatorNameLang":"en"},{"creatorName":"Shinya, Hashiguchi","creatorNameLang":"en"},{"creatorName":"Naoto, Fukumoto","creatorNameLang":"en"},{"creatorName":"Koji, Inoue","creatorNameLang":"en"},{"creatorName":"Kazuaki, Murakami","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_3_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11833852","subitem_source_identifier_type":"NCID"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_6501","resourcetype":"journal article"}]},"item_3_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"1882-7829","subitem_source_identifier_type":"ISSN"}]},"item_3_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本稿では，3次元積層DRAMの利用を前提とし，大幅なチップ面積の増加をともなうことなく高いメモリ性能を達成可能な新しいキャッシュ・アーキテクチャを提案する．3次元積層されたDRAMを大容量キャッシュとして活用することで，オフチップメモリ参照回数の劇的な削減が期待できる．しかしながら，キャッシュの大容量化はアクセス時間の増加を招くため，場合によっては性能が低下する．この問題を解決するため，提案方式では，実行対象プログラムのワーキングセット・サイズに応じて3次元積層DRAMキャッシュを選択的に活用する．ベンチマークプログラムを用いた定量的評価を行った結果，提案方式は動的制御方式により平均メモリアクセス時間を15%削減した．","subitem_description_type":"Other"}]},"item_3_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"This paper proposes a novel cache architecture for 3D-implemented microprocessors. 3D-IC is one of the most interesting techniques to achieve high-performance, low-power VLSI systems. Stacking multiple dies makes it possible to implement microprocessor cores and large caches (or DRAM) into the same chip. Unfortunately, applying the 3D DRAM cache causes performance degradation for some programs, because increasing cache size makes access time longer. To tackle this issue, the proposed cache supports two operation modes: a fast but small SRAM cache mode and a slow but large DRAM cache mode. An appropriate operation mode is selected at run time based on the behavior of application programs. The evaluation results show that the proposed approach achieves 15% of memory performance improvement.","subitem_description_type":"Other"}]},"item_3_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"52","bibliographic_titles":[{"bibliographic_title":"情報処理学会論文誌コンピューティングシステム（ACS）"}],"bibliographicPageStart":"41","bibliographicIssueDates":{"bibliographicIssueDate":"2012-01-27","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"1","bibliographicVolumeNumber":"5"}]},"relation_version_is_last":true,"weko_creator_id":"11"}}