{"created":"2025-01-18T23:32:29.514310+00:00","updated":"2025-01-21T21:16:06.079221+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00075381","sets":["1164:1579:6260:6478"]},"path":["6478"],"owner":"10","recid":"75381","title":["科学技術計算プログラムの構造を利用したメニーコアアーキテクチャシミュレーション高速化手法の評価"],"pubdate":{"attribute_name":"公開日","attribute_value":"2011-07-20"},"_buckets":{"deposit":"de31f897-1642-4f29-ae59-fc533ede804c"},"_deposit":{"id":"75381","pid":{"type":"depid","value":"75381","revision_id":0},"owners":[10],"status":"published","created_by":10},"item_title":"科学技術計算プログラムの構造を利用したメニーコアアーキテクチャシミュレーション高速化手法の評価","author_link":["0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"科学技術計算プログラムの構造を利用したメニーコアアーキテクチャシミュレーション高速化手法の評価"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"プログラム解析・支援","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2011-07-20","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"早稲田大学基幹理工学部情報理工学科"},{"subitem_text_value":"早稲田大学基幹理工学部情報理工学科"},{"subitem_text_value":"早稲田大学基幹理工学部情報理工学科"},{"subitem_text_value":"早稲田大学基幹理工学部情報理工学科"},{"subitem_text_value":"早稲田大学基幹理工学部情報理工学科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/75381/files/IPSJ-ARC11196014.pdf"},"date":[{"dateType":"Available","dateValue":"2013-07-20"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC11196014.pdf","filesize":[{"value":"515.1 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"a94f74c3-ebd7-419b-96c5-6bd1f08c9346","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2011 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"石塚亮"},{"creatorName":"阿部洋一"},{"creatorName":"大胡亮太"},{"creatorName":"木村啓二"},{"creatorName":"笠原博徳"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本稿ではキャッシュやパイプラインまでシミュレーションする詳細シミュレーションと命令実行のみの高速な機能シミュレーションの両方を用いたシミュレーション精度切り替えによるメニーコアシミュレータの高速化手法を提案する．本手法はメニーコアシミュレータ上で並列化プログラムを実行することを前提としており，このプログラムの一部のみを詳細シミュレーションを行うことにより高速化を図る．このとき，詳細シミュレーションを行うサンプリング部分を実機での逐次実行プロファイル情報とプログラム構造から判断し，その分量を統計的手法により決定する．本手法を比較的規則性の高い科学技術計算である SPEC CPU 95のTOMCATV，SWIM で及び SPEC CPU 2000 の ART，EQUAKE を用いて統計学的に算出したサンプリングサイズの値を堺に，実行サイクルが収束していくことを示した．これにより，評価したところ，64 コアかつ精度切換えを想定したシミュレーションで，各アプリケーションにおいて，誤差5%の範囲で約 100 倍の高速化が可能であることを示した．","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"11","bibliographic_titles":[{"bibliographic_title":"研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2011-07-20","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"14","bibliographicVolumeNumber":"2011-ARC-196"}]},"relation_version_is_last":true,"weko_creator_id":"10"},"id":75381,"links":{}}