@techreport{oai:ipsj.ixsq.nii.ac.jp:00068988,
 author = {大賀, 健司 and 姚, 駿 and 中田, 尚 and 嶋田, 創 and 山下, 茂 and 中島, 康彦 and Kenji, Oga and Jun, Yao and Takashi, Nakada and Hajime, Shimada and Shigeru, Yamashita and Yasuhiko, Nakashima},
 issue = {20},
 month = {Mar},
 note = {継続的な LSI 製造プロセス微細化に伴い，トランジスタの故障率や特性ばらつきは増大する傾向にある．この問題を解決するため，二線式論理で耐故障性に優れ，セル内/セル間のトランジスタ配置にも考慮した高信頼セルが提案されてきた．これまでに，この高信頼セルを用いて比較器，加算器が設計されており，レイアウトベースでの故障率を元にした信頼性，遅延時間の評価が行われてきた．しかし，これらの評価は単一のセル故障に対して行われたものであり，回路中の複数セル故障時の問題を取り扱っていない．また再収斂を含む回路に起因する問題も取り扱っていない．そのため，これらの信頼性評価手法では不完全な評価しか行えないという問題があった．そこで本論文では，再収斂を考慮に入れ，さらに回路中の複数セル故障に対応した信頼性評価手法を提案した．また回路面積を増加させることなく複数セル故障時の回路故障率を低減する論理設計手法を提案し，その有効性を評価した．提案した信頼性評価手法により，これまで不可能だった再収斂を含む一般の回路に対する評価が可能となった．また，提案した論理設計手法により回路故障率が平均で 53% 減少することを示した．, Recently, with the continuous down-scaling of semiconductor process technologies, the failure rate and performance variations among transistors tend to increase. They will cause reliability threats for future electronic devices. To alleviate the dependability problems, standard cells named Highly Reliable Cells (HRCs) were previously proposed by using transmission gates and dual rail logic to lower the failure rate, and balancing numbers and distances of transistors between cells to decrease performance variations. The previous research also designed functional units from HRCs and evaluated its reliability, delay, and area respectively. However, the previous evaluations were based on the assumption of up to one single fault per circuit without convergence. In this research, for a more practical environment consideration, we proposed an evaluation method, which take multiple failures and convergences into account. Moreover, a design scheme has been widely studied to effectively avoid the area increase, which is a common side effect toward high reliability. The results show that with the proposed reliability evaluation scheme, an accurate study of the general circuit dependability becomes possible. Our detailed evaluation indicated that we could reduce 53% of circuit failare without area extension.},
 title = {少品種高信頼セルを用いた高信頼回路設計手法と信頼性評価手法の提案},
 year = {2010}
}