{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00068975","sets":["1164:2036:5978:6080"]},"path":["6080"],"owner":"10","recid":"68975","title":["FPGAを用いた制約最適化問題の解法の検討"],"pubdate":{"attribute_name":"公開日","attribute_value":"2010-03-19"},"_buckets":{"deposit":"0d3009a7-c231-487a-944e-49568f287727"},"_deposit":{"id":"68975","pid":{"type":"depid","value":"68975","revision_id":0},"owners":[10],"status":"published","created_by":10},"item_title":"FPGAを用いた制約最適化問題の解法の検討","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"FPGAを用いた制約最適化問題の解法の検討"},{"subitem_title":"A Study of hardware solver for Constraint Optimization Problems","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"ハードウェア","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2010-03-19","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"名古屋工業大学"},{"subitem_text_value":"名古屋工業大学"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Naogya Institute of Technology","subitem_text_language":"en"},{"subitem_text_value":"Naogya Institute of Technology","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":10,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/68975/files/IPSJ-SLDM10144007.pdf","label":"IPSJ-SLDM10144007"},"date":[{"dateType":"Available","dateValue":"2012-03-19"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM10144007.pdf","filesize":[{"value":"153.6 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"bb99c6c9-9e7a-496a-a9ae-f6c51ba4df8d","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2010 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"松井, 俊浩"},{"creatorName":"松尾, 啓志"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Toshihiro, Matsui","creatorNameLang":"en"},{"creatorName":"Hiroshi, Matsuo","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本研究では，組み合わせ最適化問題の一つである，制約最適化問題のハードウェア解法のための基礎検討を行う．FPGA を用いた探索問題のハードウェア解法は，比較的大規模な探索問題の高速解法として研究されている．このような解法は，また，自律・協調的な複数の機器から構成される分散システムにおいて，各機器が有する FPGA を用いて，自律・協調処理のために必要な組み合わせ最適化問題を解くことに適用できる可能性がある．そこで本研究では人工知能分野における基本的な問題の表現である制約最適化問題のためのハードウェア解法を検討する．深さ優先探索に基づく，基本的な解法を FPGA 上に実装し，実験により有効性を評価する．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"In this work, a hardware-solver of the constraint optimization problem is studied. Hardware-solvers that are implemented on FPGAs has been studied as effective accelerators of search problems. Such approaches may be applied to optimization problems in autonomous/cooperative system whose sub-systems have FPGAs. Therefore, we study a hardware solver of the constraint optimization problems that are basic representations in artificial intelligence. A simple solver that employs a depth-first search is implemented on FPGA. The solver is evaluated by experiments.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2010-03-19","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"7","bibliographicVolumeNumber":"2010-SLDM-144"}]},"relation_version_is_last":true,"weko_creator_id":"10"},"id":68975,"updated":"2025-01-21T22:22:01.934164+00:00","links":{},"created":"2025-01-18T23:28:32.134015+00:00"}