{"updated":"2025-01-22T00:39:24.839793+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00067377","sets":["1164:1579:5982:5983"]},"path":["5983"],"owner":"10","recid":"67377","title":["H.264/AVCエンコーダのマルチコアプロセッサにおける階層的並列処理"],"pubdate":{"attribute_name":"公開日","attribute_value":"2010-01-21"},"_buckets":{"deposit":"fdc11ca1-9f48-4225-884e-de6f8d1965f8"},"_deposit":{"id":"67377","pid":{"type":"depid","value":"67377","revision_id":0},"owners":[10],"status":"published","created_by":10},"item_title":"H.264/AVCエンコーダのマルチコアプロセッサにおける階層的並列処理","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"H.264/AVCエンコーダのマルチコアプロセッサにおける階層的並列処理"},{"subitem_title":"Hierarchical Parallel Processing of H.264/AVC Encoder on an Multicore Processor","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"メディア処理技術","subitem_subject_scheme":"Other"}]},"item_type_id":"4","publish_date":"2010-01-21","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"早稲田大学基幹理工学部情報理工学科"},{"subitem_text_value":"早稲田大学基幹理工学部情報理工学科"},{"subitem_text_value":"早稲田大学基幹理工学部情報理工学科"},{"subitem_text_value":"早稲田大学基幹理工学部情報理工学科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/67377/files/IPSJ-ARC10187022.pdf"},"date":[{"dateType":"Available","dateValue":"2012-01-21"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC10187022.pdf","filesize":[{"value":"521.8 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"0bae4663-111c-4840-a10b-c48d44025f50","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2010 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"見神, 広紀"},{"creatorName":"宮本, 孝道"},{"creatorName":"木村, 啓二"},{"creatorName":"笠原, 博徳"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Hiroki, Mikami","creatorNameLang":"en"},{"creatorName":"Takamichi, Miyamoto","creatorNameLang":"en"},{"creatorName":"Keiji, Kimura","creatorNameLang":"en"},{"creatorName":"Hironori, Kasahara","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本稿ではビデオコーデックである H.264/AVC エンコーダの高速化手法としてフレームおよびマクロブロックでの階層的な並列処理を提案する．H.264/AVC エンコーダの一実装である x264 上にマクロブロックでの並列処理機能を実装し，64 コアのマルチコアシステム上での処理性能の評価を行った．その結果，2 コア集積のマルチコアである Intel Itanium2 (Montvale) を 32 基搭載した 64 コア構成の ccNUMA サーバである SGI Altix450 において，フレームでの並列処理のみの場合が 6.3 倍であったのに対しフレームおよびマクロブロックの 2 階層で行った場合は 10.6 倍の性能向上が得られた．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"This paper proposes hierarchical parallel processing method of H.264/AVC encoder. Data structures and data dependencies are analyzed to exploit multi-level parallelization as frame-level and macroblock-level. We implemented macroblock-level parallel processing on the x264, an open source H.264/AVC encoder. As a result, on SGI Altix450 (Intel Itanium2 (Montvale), 64 cores ccNUMA server), speed up is saturated by using 8 cores when execute encoder in only frame-level parallelization. However, scalable speedup is attained when execute encoder in frame and macroblock multi-level parallelization.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2010-01-21","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"22","bibliographicVolumeNumber":"2010-ARC-187"}]},"relation_version_is_last":true,"weko_creator_id":"10"},"created":"2025-01-18T23:27:48.830106+00:00","id":67377,"links":{}}