@article{oai:ipsj.ixsq.nii.ac.jp:00066212,
 author = {Gang, Zeng and Hiroyuki, Tomiyama and Hiroaki, Takada and Gang, Zeng and Hiroyuki, Tomiyama and Hiroaki, Takada},
 journal = {IPSJ Transactions on System LSI Design Methodology （TSLDM）},
 month = {Aug},
 note = {A dynamic energy performance scaling (DEPS) framework is proposed for energy savings in hard real-time embedded systems. In this generalized framework, two existing technologies, i.e., dynamic hardware resource configuration (DHRC) and dynamic voltage frequency scaling (DVFS) are combined for energy performance tradeoff. The problem of selecting the optimal hardware configuration and voltage/frequency parameters is formulated to achieve maximal energy savings and meet the deadline constraint simultaneously. Through case studies, the effectiveness of DEPS has been validated., A dynamic energy performance scaling (DEPS) framework is proposed for energy savings in hard real-time embedded systems. In this generalized framework, two existing technologies, i.e., dynamic hardware resource configuration (DHRC) and dynamic voltage frequency scaling (DVFS) are combined for energy performance tradeoff. The problem of selecting the optimal hardware configuration and voltage/frequency parameters is formulated to achieve maximal energy savings and meet the deadline constraint simultaneously. Through case studies, the effectiveness of DEPS has been validated.},
 pages = {167--179},
 title = {A Generalized Framework for Energy Savings in Hard Real-Time Embedded Systems},
 volume = {2},
 year = {2009}
}