@article{oai:ipsj.ixsq.nii.ac.jp:00066205,
 author = {Ryosuke, Inagaki and Norio, Sadachika and Dondee, Navarro and MitikoMiura-Mattausch and Yasuaki, Inoue and Ryosuke, Inagaki and Norio, Sadachika and Dondee, Navarro and Mitiko, Miura-Mattausch and Yasuaki, Inoue},
 journal = {IPSJ Transactions on System LSI Design Methodology （TSLDM）},
 month = {Feb},
 note = {A GIDL (Gate Induced Drain Leakage) current model for advanced MOSFETs is proposed and implemented into HiSIM2, complete surface potential based MOSFET model. The model considers two tunneling mechanisms, the band-to-band tunneling and the trap assisted tunneling. Totally 7 model parameters are introduced. Simulation results of NFETs and PFETs reproduce measurements for any device size without binning of model parameters. The influence of the GIDL current is investigated with circuits, which are sensitive to the change of the stored charge due to the GIDL current., A GIDL (Gate Induced Drain Leakage) current model for advanced MOSFETs is proposed and implemented into HiSIM2, complete surface potential based MOSFET model. The model considers two tunneling mechanisms, the band-to-band tunneling and the trap assisted tunneling. Totally 7 model parameters are introduced. Simulation results of NFETs and PFETs reproduce measurements for any device size without binning of model parameters. The influence of the GIDL current is investigated with circuits, which are sensitive to the change of the stored charge due to the GIDL current.},
 pages = {93--102},
 title = {A GIDL-Current Model for Advanced MOSFET Technologies without Binning},
 volume = {2},
 year = {2009}
}