{"created":"2025-01-18T23:24:03.255398+00:00","updated":"2025-01-21T22:23:08.408182+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00062013","sets":["1164:2036:5619:5650"]},"path":["5650"],"owner":"10","recid":"62013","title":["Non-uniform Selective Way Cache の動的制御による組込みプロセッサの省エネルギー化"],"pubdate":{"attribute_name":"公開日","attribute_value":"2009-02-26"},"_buckets":{"deposit":"d2130e42-496b-437a-8c72-ceb874568b6c"},"_deposit":{"id":"62013","pid":{"type":"depid","value":"62013","revision_id":0},"owners":[10],"status":"published","created_by":10},"item_title":"Non-uniform Selective Way Cache の動的制御による組込みプロセッサの省エネルギー化","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Non-uniform Selective Way Cache の動的制御による組込みプロセッサの省エネルギー化"},{"subitem_title":"A Dynamic Management Technique of a Non-uniform Selective Way Cache for Reducing the Energy Consumption of Embedded Processors","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2009-02-26","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"九州大学大学院システム情報科学府"},{"subitem_text_value":"九州大学システムLSI 研究センター"},{"subitem_text_value":"九州大学"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Information Science and Electrical Engineering, Kyushu University","subitem_text_language":"en"},{"subitem_text_value":"System LSI Research Center, Kyushu University","subitem_text_language":"en"},{"subitem_text_value":"Kyushu University ","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":10,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/62013/files/IPSJ-SLDM09139003.pdf","label":"IPSJ-SLDM09139003"},"date":[{"dateType":"Available","dateValue":"2011-02-26"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM09139003.pdf","filesize":[{"value":"862.6 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"ac5ede24-6302-4dcc-b697-023e4a9b616d","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2009 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"石飛, 百合子"},{"creatorName":"石原, 亨"},{"creatorName":"安浦, 寛人"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Yuriko, Ishitobi","creatorNameLang":"en"},{"creatorName":"Tohru, Ishihara","creatorNameLang":"en"},{"creatorName":"Hiroto, Yasuura","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本稿は Non-uniform Selective Way Cache (NSWC) の動的ウェイ切り替えによる組込みプロセッサの省エネルギー化手法の提案を行う． NSWC は，消費エネルギーの観点で異なる性質の 2 種類のウェイを保持する．提案手法は命令キャッシュとして NSWC を用い，アプリケーションプログラムへのウェイ切り替え命令を挿入することで， 動的なウェイ切り替えを行う．動的ウェイ切り替えを行うことで，キャッシュメモリのアクセスエネルギーの削減と高いキャッシュヒット率を両立し，組込みプロセッサの省エネルギー化を実現する．提案手法を用いることで，セット・アソシアティブ方式のキャッシュメモリを利用した場合と比較して 7% ～ 20% の消費エネルギー削減効果を確認した．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"This paper proposes a dynamic management technique of Non-uniform Selective Way Cache(NSWC) for reducing the total energy consumption of a CPU core, cache memories, and off-chip memories. NSWC has a way uses low supply (Vdd) and low threshould (Vth). In our approach, we decide insert points of instructions to change available ways in the Non-uniform Selective Way Cache. Experiments using parameters of a commercial embedded processor and an off-chip SDRAM demonstrate that our algorithm reduces the energy consumption of the processor system by 7%-20% compared to the result of a processor with a same size set associative cache memory. ","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"18","bibliographic_titles":[{"bibliographic_title":"研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"13","bibliographicIssueDates":{"bibliographicIssueDate":"2009-02-26","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"22(2009-SLDM-139)","bibliographicVolumeNumber":"2009"}]},"relation_version_is_last":true,"weko_creator_id":"10"},"id":62013,"links":{}}