{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00061064","sets":["1164:1579:5607:5608"]},"path":["5608"],"owner":"10","recid":"61064","title":["携帯機器向けフルHD対応H.264ハイプロフアイルピデオコーデックIPの開発"],"pubdate":{"attribute_name":"公開日","attribute_value":"2009-01-06"},"_buckets":{"deposit":"0cd28d04-d33c-499e-8d61-af844cdb275c"},"_deposit":{"id":"61064","pid":{"type":"depid","value":"61064","revision_id":0},"owners":[10],"status":"published","created_by":10},"item_title":"携帯機器向けフルHD対応H.264ハイプロフアイルピデオコーデックIPの開発","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"携帯機器向けフルHD対応H.264ハイプロフアイルピデオコーデックIPの開発"},{"subitem_title":"A Low-Power Full-HD H.264 High-Profile Codec Based on a Heterogeneous Multiprocessor Architecture","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2009-01-06","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"(株)ルネサステクノロジシステムソリューション統括本部"},{"subitem_text_value":"(株)ルネサステクノロジシステムソリューション統括本部"},{"subitem_text_value":"(株)ルネサステクノロジシステムソリューション統括本部"},{"subitem_text_value":"(株)ルネサステクノロジシステムソリューション統括本部"},{"subitem_text_value":"(株)ルネサステクノロジシステムソリューション統括本部"},{"subitem_text_value":"(株)ルネサステクノロジシステムソリューション統括本部"},{"subitem_text_value":"(株)日立製作所中央研究所"},{"subitem_text_value":"(株)日立製作所中央研究所"},{"subitem_text_value":"(株)日立製作所中央研究所"},{"subitem_text_value":"(株)ルネサステクノロジシステムソリューション統括本部"},{"subitem_text_value":"(株)ルネサステクノロジシステムソリューション統括本部"},{"subitem_text_value":"(株)ルネサステクノロジシステムソリューション統括本部"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"System Solution Business Group, Renesas Technology Corp.","subitem_text_language":"en"},{"subitem_text_value":"System Solution Business Group, Renesas Technology Corp.","subitem_text_language":"en"},{"subitem_text_value":"System Solution Business Group, Renesas Technology Corp.","subitem_text_language":"en"},{"subitem_text_value":"System Solution Business Group, Renesas Technology Corp.","subitem_text_language":"en"},{"subitem_text_value":"System Solution Business Group, Renesas Technology Corp.","subitem_text_language":"en"},{"subitem_text_value":"System Solution Business Group, Renesas Technology Corp.","subitem_text_language":"en"},{"subitem_text_value":"Central Research Laboratory, Hitachi, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Central Research Laboratory, Hitachi, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Central Research Laboratory, Hitachi, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"System Solution Business Group, Renesas Technology Corp.","subitem_text_language":"en"},{"subitem_text_value":"System Solution Business Group, Renesas Technology Corp.","subitem_text_language":"en"},{"subitem_text_value":"System Solution Business Group, Renesas Technology Corp.","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":10,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/61064/files/IPSJ-ARC09181020.pdf","label":"IPSJ-ARC09181020"},"date":[{"dateType":"Available","dateValue":"2011-02-10"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC09181020.pdf","filesize":[{"value":"661.0 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"a40bea7a-fb73-4cd5-8322-78fa00d313c4","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2009 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"岩田, 憲一"},{"creatorName":"望月, 誠二"},{"creatorName":"木村, 基"},{"creatorName":"柴山, 哲也"},{"creatorName":"泉原, 史幸"},{"creatorName":"植田, 浩司"},{"creatorName":"細木, 浩二"},{"creatorName":"中田, 啓明"},{"creatorName":"江浜, 真和"},{"creatorName":"見学, 徹"},{"creatorName":"中沢, 拓一郎"},{"creatorName":"渡辺, 浩巳"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Kenichi, Iwata","creatorNameLang":"en"},{"creatorName":"Seiji, Mochizuki","creatorNameLang":"en"},{"creatorName":"Motoki, Kimura","creatorNameLang":"en"},{"creatorName":"Tetsuya, Shibayama","creatorNameLang":"en"},{"creatorName":"Fumitaka, Izuhara","creatorNameLang":"en"},{"creatorName":"Hiroshi, Ueda","creatorNameLang":"en"},{"creatorName":"Koji, Hosogi","creatorNameLang":"en"},{"creatorName":"Hiroaki, Nakata","creatorNameLang":"en"},{"creatorName":"Masakazu, Ehama","creatorNameLang":"en"},{"creatorName":"Toru, Kengaku","creatorNameLang":"en"},{"creatorName":"Takuichiro, Nakazawa","creatorNameLang":"en"},{"creatorName":"Hiromi, Watanabe","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"デジタルカメラや携帯電話などの携帯画像記録機器向けに,フル、に対応した H.264 ハイプロファイルピデオコーデック IP を開発した.符号処理と画像処理の 2 段階処理,および,マクロブロック 2 並列パイプライン処理により,フル HD サイズのエンコード/デコードを 162 MHz でリアルタイム処理可能である.65-nm CMOS に実装したテストチップは,フル HD サイズの H.264 エンコード処理を 256 mW で実現した.","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"A video-size-scalable H.264 High-Profile codec including 19 application-specific CPUs for extensibility to multiple standards has been fabricated in 65-nm CMOS. With two parallel pipelines for macroblock processing, the codec consumed 256 mW in real-time encoding of 40-Mbps full-HD video at an operating frequency of 162 MHz.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"116","bibliographic_titles":[{"bibliographic_title":"研究報告計算機アーキテクチャ(ARC)"}],"bibliographicPageStart":"111","bibliographicIssueDates":{"bibliographicIssueDate":"2009-01-06","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"1(2009-ARC-181)","bibliographicVolumeNumber":"2009"}]},"relation_version_is_last":true,"weko_creator_id":"10"},"id":61064,"updated":"2025-01-21T22:16:41.690652+00:00","links":{},"created":"2025-01-18T23:23:20.583639+00:00"}