{"updated":"2025-01-22T03:00:38.357025+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00060762","sets":["934:1119:5602:5604"]},"path":["5604"],"owner":"10","recid":"60762","title":["演算加速機構を持つオンチップメモリプロセッサの検討と電力性能評価"],"pubdate":{"attribute_name":"公開日","attribute_value":"2009-03-25"},"_buckets":{"deposit":"6152ebe3-b9bd-442f-9a93-bc3c13423645"},"_deposit":{"id":"60762","pid":{"type":"depid","value":"60762","revision_id":0},"owners":[10],"status":"published","created_by":10},"item_title":"演算加速機構を持つオンチップメモリプロセッサの検討と電力性能評価","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"演算加速機構を持つオンチップメモリプロセッサの検討と電力性能評価"},{"subitem_title":"Design and Power Performance Evaluation of On-chip Memory Processor with Arithmetic Accelerators","subitem_title_language":"en"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"プロセッサアーキテクチャ","subitem_subject_scheme":"Other"}]},"item_type_id":"3","publish_date":"2009-03-25","item_3_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"筑波大学／現在，株式会社ルネサステクノロジ"},{"subitem_text_value":"筑波大学"},{"subitem_text_value":"筑波大学"},{"subitem_text_value":"筑波大学"},{"subitem_text_value":"筑波大学"},{"subitem_text_value":"東京大学,筑波大学"},{"subitem_text_value":"株式会社日立製作所"},{"subitem_text_value":"株式会社日立製作所"},{"subitem_text_value":"株式会社日立製作所"}]},"item_3_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"University of Tsukuba / Presently with Renesas Technology Corporation","subitem_text_language":"en"},{"subitem_text_value":"University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"The University of Tokyo,University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"Hitachi, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Hitachi, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Hitachi, Ltd.","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing 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Japan"}]},"item_3_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"高橋, 睦史"},{"creatorName":"佐藤, 三久"},{"creatorName":"高橋, 大介"},{"creatorName":"朴, 泰祐"},{"creatorName":"宇川, 彰"},{"creatorName":"中村, 宏"},{"creatorName":"青木, 秀貴"},{"creatorName":"澤本, 英雄"},{"creatorName":"助川, 直伸"}],"nameIdentifiers":[{}]}]},"item_3_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Chikafumi, Takahashi","creatorNameLang":"en"},{"creatorName":"Mitsuhisa, Sato","creatorNameLang":"en"},{"creatorName":"Daisuke, Takahashi","creatorNameLang":"en"},{"creatorName":"Taisuke, Boku","creatorNameLang":"en"},{"creatorName":"Akira, Ukawa","creatorNameLang":"en"},{"creatorName":"Hiroshi, Nakamura","creatorNameLang":"en"},{"creatorName":"Hidetaka, Aoki","creatorNameLang":"en"},{"creatorName":"Hideo, Sawamoto","creatorNameLang":"en"},{"creatorName":"Naonobu, Sukegawa","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_3_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11833852","subitem_source_identifier_type":"NCID"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_6501","resourcetype":"journal article"}]},"item_3_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"1882-7829","subitem_source_identifier_type":"ISSN"}]},"item_3_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本稿では電力性能の向上に有効であるオンチップメモリプロセッサアーキテクチャSCIMAに，電力コストに有利な演算加速機構を導入することとし，その構成を検討し電力性能を評価する．演算加速機構としてベクトル型およびSIMD型の2種の方式を提案し，シミュレーションにより評価を行った結果，行列積演算および実アプリケーションであるQCD kernelにおいてはレジスタの要素数の差などの要因によりベクトル型がSIMD型の電力性能を上回り，全体としては主記憶バンド幅律速とならなければ，倍精度浮動小数点積和演算器（以降，FMA）の多いベクトル型がつねに優位であった．電力効率はベクトル型16FMAのときに最大となり，8コア時の電力効率は約1.58GFLOPS/Wを示し，従来のプロセッサよりも高い電力効率を示すことが分かった．","subitem_description_type":"Other"}]},"item_3_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"In this paper, we design an on-chip memory processor with arithmetic accelerators, which is expected to be effective to improve power consumption. In addition, we evaluate power performance of the processor. We propose vectortype arithmetic accelerators and SIMD-type arithmetic accelerators into onchip memory processor. The results of evaluation on our simulator indicate that the 4FMAs (Fused Multiply-Adders) Vector-type accelerator's performance exceeds the 4FMAs SIMD-type accelerator's on matrix multiplication and QCD kernel because of difference of the elements size of registers and so forth. The 16FMAs vector-type has advantage on almost all simulations excluding main memory bandwidth intensive benchmarks. Power effectivity is the maximum by vector-type 16FMAs, which indicates about 1.58GFLOPS/W in 8 cores. It shows that the proposed architecture has advantage in power efficiency compared with existing processors.","subitem_description_type":"Other"}]},"item_3_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"172","bibliographic_titles":[{"bibliographic_title":"情報処理学会論文誌コンピューティングシステム（ACS）"}],"bibliographicPageStart":"158","bibliographicIssueDates":{"bibliographicIssueDate":"2009-03-25","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"1","bibliographicVolumeNumber":"2"}]},"relation_version_is_last":true,"weko_creator_id":"10"},"created":"2025-01-18T23:23:07.438985+00:00","id":60762,"links":{}}