{"id":33187,"updated":"2025-01-22T15:50:28.222620+00:00","links":{},"created":"2025-01-18T23:02:05.504175+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00033187","sets":["1164:2735:2748:2753"]},"path":["2753"],"owner":"1","recid":"33187","title":["タイミング余裕を確保したディジタルLSIの製造後クロック調整"],"pubdate":{"attribute_name":"公開日","attribute_value":"2006-03-17"},"_buckets":{"deposit":"dbbc2212-15bc-4bdf-816b-b231f64ae624"},"_deposit":{"id":"33187","pid":{"type":"depid","value":"33187","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"タイミング余裕を確保したディジタルLSIの製造後クロック調整","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"タイミング余裕を確保したディジタルLSIの製造後クロック調整"},{"subitem_title":"Post-fabrication clock-timing adjustment for digital LSIs ensuring timing margins","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2006-03-17","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東邦大学大学院 理学研究科"},{"subitem_text_value":"半導体MIRAIプロジェクト 産業技術総合研究所 次世代半導体研究センター"},{"subitem_text_value":"半導体MIRAIプロジェクト 産業技術総合研究所 次世代半導体研究センター"},{"subitem_text_value":"半導体MIRAIプロジェクト 産業技術総合研究所 次世代半導体研究センター"},{"subitem_text_value":"東邦大学大学院 理学研究科"},{"subitem_text_value":"半導体MIRAIプロジェクト 産業技術総合研究所 次世代半導体研究センター"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Science, Toho University","subitem_text_language":"en"},{"subitem_text_value":"MIRAI Project,National Institute of Advanced Industrial Science and Technology (AIST)","subitem_text_language":"en"},{"subitem_text_value":"MIRAI Project,National Institute of Advanced Industrial Science and Technology (AIST)","subitem_text_language":"en"},{"subitem_text_value":"MIRAI Project,National Institute of Advanced Industrial Science and Technology (AIST)","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science, Toho University","subitem_text_language":"en"},{"subitem_text_value":"MIRAI Project,National Institute of Advanced Industrial Science and Technology (AIST)","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/33187/files/IPSJ-MPS06058029.pdf"},"date":[{"dateType":"Available","dateValue":"2008-03-17"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-MPS06058029.pdf","filesize":[{"value":"361.1 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"17"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"65fe8f50-9fc5-4f8b-8846-704115c125a3","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2006 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"諏佐, 達也"},{"creatorName":"村川, 正宏"},{"creatorName":"高橋, 栄一"},{"creatorName":"飯島, 洋祐"},{"creatorName":"古谷, 立美"},{"creatorName":"樋口, 哲也"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Tatsuya, Susa","creatorNameLang":"en"},{"creatorName":"Masahiro, Murakawa","creatorNameLang":"en"},{"creatorName":"Eiichi, Takahashi","creatorNameLang":"en"},{"creatorName":"Yousuke, Iijima","creatorNameLang":"en"},{"creatorName":"Tatsumi, Furuya","creatorNameLang":"en"},{"creatorName":"Tetsuya, Higuchi","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10505667","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年 ディジタルLSIの高速化や微細化に伴い 製造ばらつきにより発生するクロック・スキューが 歩留の低下を招き チップ価格の上昇を引き起こしている.この問題を解決するために ディジタルLSIの製造後クロック調整技術が提案され 調整実験の結果 歩留を向上できたことが報告されている.しかし 従来手法では電源電圧や温度などの環境変動を吸収するタイミング余裕が存在しなかったため 調整後のチップの一部で不安定な動作が観察されている.そこで本研究では 設計値よりも厳しい条件で調整することにより タイミング余裕を確保しうるディジタルLSIの製造後クロック調整手法を提案する.遺伝的アルゴリズムを用いた調整実験の結果 タイミング余裕を確保した上で歩留を大幅に向上させることに成功した.","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"To solve the problem of fluctuations in clock timing with digital LSIs (also known as the \"clock skew\" problem), we propose a post-fabrication clock adjustment method that ensures robust clock-timing to cope with fluctuations in the LSI environment such as temperature or power supply voltage. This method is realized by adjustment on severer condition than specifications of the LSI. Simulation experiments with genetic algorithms show that the proposed method can enhance the operational yields while ensuring sufficient timing margins.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"112","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告数理モデル化と問題解決（MPS）"}],"bibliographicPageStart":"109","bibliographicIssueDates":{"bibliographicIssueDate":"2006-03-17","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"29(2006-MPS-058)","bibliographicVolumeNumber":"2006"}]},"relation_version_is_last":true,"weko_creator_id":"1"}}