{"created":"2025-01-18T22:59:13.815399+00:00","updated":"2025-01-22T17:35:54.231692+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00029359","sets":["1164:2240:2278:2280"]},"path":["2280"],"owner":"1","recid":"29359","title":["メモリスロットに搭載されるNICのクラスタ性能予測"],"pubdate":{"attribute_name":"公開日","attribute_value":"2001-07-25"},"_buckets":{"deposit":"18f37849-b781-45e8-ac4f-eb8788ac8806"},"_deposit":{"id":"29359","pid":{"type":"depid","value":"29359","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"メモリスロットに搭載されるNICのクラスタ性能予測","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"メモリスロットに搭載されるNICのクラスタ性能予測"},{"subitem_title":"Performance Estimation of a Cluster with a NIC Plugged into a Memory Slot","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2001-07-25","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東京農工大学"},{"subitem_text_value":"東京農工大学"},{"subitem_text_value":"（株）東芝　研究開発センター"},{"subitem_text_value":"新情報処理開発機構"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Tokyo University of Agliculture and Technology","subitem_text_language":"en"},{"subitem_text_value":"Tokyo University of Agliculture and Technology","subitem_text_language":"en"},{"subitem_text_value":"TOSHIBA Corporate Research & Development Center","subitem_text_language":"en"},{"subitem_text_value":"Real World Computing Partnership","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/29359/files/IPSJ-HPC01087019.pdf"},"date":[{"dateType":"Available","dateValue":"2003-07-25"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-HPC01087019.pdf","filesize":[{"value":"1.1 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"14"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"d13e6a2a-aa07-4f25-b6e7-0399736ab46f","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2001 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"濱田, 芳博"},{"creatorName":"中條拓伯"},{"creatorName":"田邊, 昇"},{"creatorName":"工藤, 知宏"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Yoshihiro, Hamada","creatorNameLang":"en"},{"creatorName":"Hironori, Nakajo","creatorNameLang":"en"},{"creatorName":"Noboru, Tanabe","creatorNameLang":"en"},{"creatorName":"Tomohiro, Kudoh","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10463942","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"PCメモリスロットへ搭載し，低レイテンシかつ高バンド幅な通信を可能にするネットワークインターフェース（NIC）として新情報処理開発機構並列分散システムアーキテクチャ研究室で開発が行われている．本報告書ではDIMMnet-1について，ホストCPU-NIC間のバンド幅という観点から性能予測を行う．比較対象はPCIバス上へ搭載されるMyrinet社のNIC(33/66MHz)であり，これらのNICは同等の送受信機構と物理接続を持つと仮定した．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"Real World Computing Partnership has been developing a new network interface called DIMMnet-1 that is plugged into a memory bus in a PC in order to establish a low latency and high bandwidth network for cluster computing. In this paper performance estimation is discribed bandwidth of a data path between CPU and NIC. A target for comparision is Myrinet of Myricom. We assume that both NIC's holds the same transfer mechanisms and physical connection, and discuss advantage and disadvantage of memory bus and I/O bus.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"110","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告ハイパフォーマンスコンピューティング（HPC）"}],"bibliographicPageStart":"105","bibliographicIssueDates":{"bibliographicIssueDate":"2001-07-25","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"77(2001-HPC-087)","bibliographicVolumeNumber":"2001"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"id":29359,"links":{}}