{"updated":"2025-01-22T17:56:33.796159+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00028714","sets":["1164:2240:2241:2246"]},"path":["2246"],"owner":"1","recid":"28714","title":["走行時パワーゲーティングのための命令実行制御手法の検討"],"pubdate":{"attribute_name":"公開日","attribute_value":"2008-03-05"},"_buckets":{"deposit":"e3635e73-b8fd-470e-8fba-0029986db054"},"_deposit":{"id":"28714","pid":{"type":"depid","value":"28714","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"走行時パワーゲーティングのための命令実行制御手法の検討","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"走行時パワーゲーティングのための命令実行制御手法の検討"},{"subitem_title":"Instruction Execution Control for Run-Time Power-Gating","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2008-03-05","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東京大学先端科学技術研究センター"},{"subitem_text_value":"東京大学先端科学技術研究センター"},{"subitem_text_value":"東京大学先端科学技術研究センター"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Research Center for Advanced Science and Technology, The University of Tokyo","subitem_text_language":"en"},{"subitem_text_value":"Research Center for Advanced Science and Technology, The University of Tokyo","subitem_text_language":"en"},{"subitem_text_value":"Research Center for Advanced Science and Technology, The University of Tokyo","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/28714/files/IPSJ-HPC08114017.pdf"},"date":[{"dateType":"Available","dateValue":"2010-03-05"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-HPC08114017.pdf","filesize":[{"value":"693.7 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"14"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"dd26207a-65d4-4342-9d94-a7c3df3c1fc4","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2008 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"高木, 紀子"},{"creatorName":"近藤, 正章"},{"creatorName":"中村, 宏"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Noriko, Takagi","creatorNameLang":"en"},{"creatorName":"Kondo, Masaaki","creatorNameLang":"en"},{"creatorName":"Hiroshi, Nakamura","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10463942","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年リーク電流による消費電力の増加が問題となっている．本論文では特に演算器等のロジック部の走行時リーク電力をパワーゲーティング手法を用いて削減することを目的とした命令実行制御方式について検討する．本方式は処理を時間的・空間的に機能ブロックに閉じ込め，処理を行う際はなるべくまとめて実行し，ストール時にはなるべく長くストールするように最適化するものである．そのための時間的最適化手法としてキャッシュミス発生時の新しい命令実行制御方式と，また空間的最適化手法としてIPCを観測しながら同時発行命令数を変更する方式を提案する．ALUに対して評価を行った結果，本手法は性能低下を抑えつつ，効果的に走行時リーク電力を削減できることがあることが分かった．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"As semiconductor technology scales down, leakage-power becomes dominant in the total power consumption of LSI chips. To reduce runtime leakage-power, we propose a new instruction execution control strategy in which a set of processing is put into temporally and spatially packed a region to maximize leakage-energy saving by a power-gating technique. We propose an execution control method when cache misses occur and also propose a fine-grain issue-width control technique. We evaluate the proposed strategy and the result reveals that the proposed method effectively reduces runtime leakage-energy with little performance degradation.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"102","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告ハイパフォーマンスコンピューティング（HPC）"}],"bibliographicPageStart":"97","bibliographicIssueDates":{"bibliographicIssueDate":"2008-03-05","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"19(2008-HPC-114)","bibliographicVolumeNumber":"2008"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"created":"2025-01-18T22:58:45.266115+00:00","id":28714,"links":{}}