{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00028397","sets":["1164:2036:2155:2158"]},"path":["2158"],"owner":"1","recid":"28397","title":["ハードウェア記述言語A ι δ η ξ"],"pubdate":{"attribute_name":"公開日","attribute_value":"1987-07-23"},"_buckets":{"deposit":"85e1cdec-2498-409e-a015-b382111183fb"},"_deposit":{"id":"28397","pid":{"type":"depid","value":"28397","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"ハードウェア記述言語A ι δ η ξ","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"ハードウェア記述言語A ι δ η ξ"},{"subitem_title":"HARDWARE DESCRIPTION LANGUAGE ι δ η ξ (in Japanese)","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"1987-07-23","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"筑波大学　工学研究科"},{"subitem_text_value":"筑波大学電子・情報工学系"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Doctoral Program in Engineering, University of Tsukuba","subitem_text_language":"en"},{"subitem_text_value":"Institute of Information Sciences and Electronics, University of Tsukuba","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/28397/files/IPSJ-SLDM87038001.pdf"},"date":[{"dateType":"Available","dateValue":"1989-07-23"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM87038001.pdf","filesize":[{"value":"1.6 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"76d1f974-921e-42ca-aa9f-c74212283e8c","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 1987 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"中村, 敦司"},{"creatorName":"板野肯三"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Atsushi, Nakamura","creatorNameLang":"en"},{"creatorName":"Kozo, Itan0","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"レジスタ転送レベルのハードウェア記述言語”Aιδηζ(HaDes:Hardware Describer)を設計し、言語の妥当性を検証するために、その記述からシミュレータを生成する簡単な処理系を作成した。”Aιδηζでは、モジュールやロジックと呼ぶ局所的な記述単位を導入することにより、モジュール性の高い記述でハードウェアを表現する。複数のハードウェアを生成するテンプレートの記述によって記述単位が定義されるため、多様なハードウェアを抽象化された簡潔な記述で表現することができる。また、実行の段階では、すべての記憶要素がレジスタ転送レベルの動作をするため、記憶要素の間のデータ転送は1クロックの間に同時に起こる、動作として関数性を保って記述される。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"A register-transfer-level hardware description language \"Aιδηζ has been designed and implemented as a simulator generator to verify the validity. In \"Aιδηζ, the description units such as modules and logics are introduced for the abstract definitions of hardware structures. Actual hardware components are generated as instances by using the description units as templates. Since the generated hardware components have functional property within a single clock period, the data transfers between storage components can be manipulated on the restricted functional model.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"8","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"1987-07-23","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"51(1987-SLDM-038)","bibliographicVolumeNumber":"1987"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"id":28397,"updated":"2025-01-22T18:04:55.891715+00:00","links":{},"created":"2025-01-18T22:58:31.042988+00:00"}