{"links":{},"id":28087,"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00028087","sets":["1164:2036:2120:2125"]},"path":["2125"],"owner":"1","recid":"28087","title":["32－ビットマイクロプロセッサV810の設計手法"],"pubdate":{"attribute_name":"公開日","attribute_value":"1993-01-21"},"_buckets":{"deposit":"e812ad5b-286a-4854-b99e-d66a2e9c027a"},"_deposit":{"id":"28087","pid":{"type":"depid","value":"28087","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"32－ビットマイクロプロセッサV810の設計手法","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"32－ビットマイクロプロセッサV810の設計手法"},{"subitem_title":"A 32 - Bit RISC Microprocessor V810 and it's design techniques.","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"1993-01-21","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"NEC ULSIシステム開発研究所基盤技術開発部"},{"subitem_text_value":"NEC ULSIシステム開発研究所CAD応用技術部"},{"subitem_text_value":"NEC ULSIシステム開発研究所CAD応用技術部"},{"subitem_text_value":"NECアイシーマイコンシステム（株）九州LSI開発センター　マイクロコンピュータ第二技術部"},{"subitem_text_value":"NECアイシーマイコンシステム（株）九州LSI開発センター　マイクロコンピュータ第二技術部"},{"subitem_text_value":"NECアイシーマイコンシステム（株）九州LSI開発センター　マイクロコンピュータ第二技術部"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"ADVANCED PROCESSOR ARCHITECTURE DEVELOPMENT LABORATORY ULSI SYSTEMS DEVEROPMENT LABORATORIES NEC Corporation","subitem_text_language":"en"},{"subitem_text_value":"ADVANCED PROCESSOR ARCHITECTURE DEVELOPMENT LABORATORY ULSI SYSTEMS DEVEROPMENT LABORATORIES NEC Corporation","subitem_text_language":"en"},{"subitem_text_value":"ADVANCED PROCESSOR ARCHITECTURE DEVELOPMENT LABORATORY ULSI SYSTEMS DEVEROPMENT LABORATORIES NEC Corporation","subitem_text_language":"en"},{"subitem_text_value":"NEC IC Microcomputer Systems, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"NEC IC Microcomputer Systems, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"NEC IC Microcomputer Systems, Ltd.","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/28087/files/IPSJ-SLDM92065020.pdf","label":"IPSJ-SLDM92065020"},"date":[{"dateType":"Available","dateValue":"2011-05-13"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM92065020.pdf","filesize":[{"value":"1.0 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"adeed5fd-e561-4454-b4e9-0fce6694cedb","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 1993 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"鈴木, 宏明"},{"creatorName":"鈴木, 千佳"},{"creatorName":"木村, 晃子"},{"creatorName":"佐藤, 庄一郎"},{"creatorName":"井手, 秀一"},{"creatorName":"坂中, 康秀"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Hiroaki, Suzuki","creatorNameLang":"en"},{"creatorName":"Chika, Suzuki","creatorNameLang":"en"},{"creatorName":"Akiko, Kimura","creatorNameLang":"en"},{"creatorName":"Syoichiro, Sato","creatorNameLang":"en"},{"creatorName":"Syuichi, Ide","creatorNameLang":"en"},{"creatorName":"Yasuhide, Sakanaka","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"V810（μPD707)はRISC技術を利用した組み込み用途向け32ビットマイクロプロセッサである。0．8μm、CMOS2層アルミプロセスを使用し、24万トランジスタを7．7×7．7mm^2のシリコンチップ上に集積した。低電圧動作（．2V?5．)、広い動作周波数(?25M)、低消費電力動作(MHz時500)を実現した。自動設計技術の本格的導入により、テープアウト前に、機能、論理、遅延、高故障検出率の達成、等の検証を実行し、ファーストシリコンにおいて、機能、スピード等が設計目標を達成していることを確認した。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"An advanced 32-bit RISC microprocessor for embedded controls ; V810 and it's design technique are described in this paper. The V810 is fablicated by using 0.8μm CMOS double metal layer process technology to integrate 240,000 transisters on a 7.7×7.7mm^2 die. In design of the V810, we used design automation techniques. The V810 was analyzed for logical correctness and timing constraint before fabrication. Finally, V810 executed realtime-OS and SPEC benchmarks correctly at first Silicons.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"162","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"155","bibliographicIssueDates":{"bibliographicIssueDate":"1993-01-21","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"6(1992-SLDM-065)","bibliographicVolumeNumber":"1993"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"created":"2025-01-18T22:58:17.036026+00:00","updated":"2025-01-21T21:37:19.503936+00:00"}