{"id":27988,"updated":"2025-01-22T18:16:06.239651+00:00","links":{},"created":"2025-01-18T22:58:12.473174+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00027988","sets":["1164:2036:2116:2118"]},"path":["2118"],"owner":"1","recid":"27988","title":["状態遷移回路の低消費電力化のための状態割当法"],"pubdate":{"attribute_name":"公開日","attribute_value":"1994-06-24"},"_buckets":{"deposit":"1bc61529-ffac-411c-95b0-5bad978cbc0a"},"_deposit":{"id":"27988","pid":{"type":"depid","value":"27988","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"状態遷移回路の低消費電力化のための状態割当法","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"状態遷移回路の低消費電力化のための状態割当法"},{"subitem_title":"Optimum State - code Assignment for Low Power Finite State Circuit","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"1994-06-24","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"東京大学工学部電子工学科"},{"subitem_text_value":"東京大学工学部電子工学科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Department of Electronic Engineering, University of Tokyo","subitem_text_language":"en"},{"subitem_text_value":"Department of Electronic Engineering, University of Tokyo","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/27988/files/IPSJ-SLDM94071004.pdf"},"date":[{"dateType":"Available","dateValue":"1996-06-24"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM94071004.pdf","filesize":[{"value":"983.1 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"a6f63074-9bb4-4256-90d6-6a706e13d171","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 1994 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"秋田, 純一"},{"creatorName":"浅田, 邦博"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"J., Akita","creatorNameLang":"en"},{"creatorName":"K., Asada","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"CMOS同期式状態遷移回路の各状態への状態コード割当が一意に定まらないことに着目し、頻繁に遷移がおこる状態間にHamming距離の短い状態コードを割り当てることによって、平均の状態間遷移時の負荷容量の充放電による消費電力を低減できる可能性とその効果を示す。また、状態遷移回路の消費電力を定量的に導くために、入力信号及び状態遷移回路の特性を確率的に表現するモデル、及びそのような最適な状態コード割当を実用的な時間内に実現するためのアルゴリズムを提案する。また、実際のフリップフロップでは、入力が変化しない時にもクロック線での電力消費があるため、それも考慮した本手法の効果を最後に示す。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"A method of state code assignment for CMOS synchronous finite state machines is described, which is effective for power reduction in flip-flops. The method is based on a state transition probability model, where power consumption in flip-flops is assumed to be proportional to average frequency of flip-flops' output states change. The optimum state code assignment obtained in this method is such that the Hamming distance of state codes, for a pair of states with higher mutual transition probability, becomes smaller. A heuristic algorithm for the state code assignment is described along with demonstration of power reduction by examples.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"29","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"23","bibliographicIssueDates":{"bibliographicIssueDate":"1994-06-24","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"54(1994-SLDM-071)","bibliographicVolumeNumber":"1994"}]},"relation_version_is_last":true,"weko_creator_id":"1"}}