@techreport{oai:ipsj.ixsq.nii.ac.jp:00027836,
 author = {片山, 勝 and 室岡, 孝宏 and 宮崎, 敏明 and 白川, 千洋 and 林, 一博 and 市森, 峰樹 and 深見, 健之助 and Masaru, Katayama and Takahiro, Murooka and Toshiaki, Miyazaki and Kazuhiro, Shirakawa and Kazuhiro, Hayashi and Takaki, Ichimori and Kennosuke, Fukami},
 issue = {101(1996-SLDM-081)},
 month = {Oct},
 note = {筆者らは，PROTEUSと呼ぶ通信処理用FPGAをアレー状に配置したFPGA?MCMを試作した，114mm□の基板上にPROTEUSチップを3×3(）個配置し，TAB実装することにより，小型化をはかっている．また，本MCMは996ピンのI/Oを持つため，圧着式のスタックコネクタでボードとの接続を行なう構成とした．MCM上の隣接FPGA間の信号伝搬遅延は200psecと高速であり，また，大規模論理を搭載可能である．本MCMを複数個搭載したシステムを別途試作し，通信処理のリアルタイム動作を確認した．, We developed an FPGA based multi-chip module whose component is the telecommunication-oriented FPGA, called PROTEUS. This module consists of 3 × 3 PROTEUS's and its size is 114mm square. Each PROTEUS chip is mounted on the MCM substrate using Tape Automated Bonding (TAB) technology, in order to minimize the size of MCM. To integrate 996 I/O pins, we use stack connectors, so, it is easy to mount it on a circuit board. The delay time between the neighbor FPGAs on the MCM is 200psec, and it is possible to implement large scale circuits in the MCM. We also developed a rapid prototype system that has several MCMs, and realized real-time telecommunication circuits in the system.},
 title = {通信処理用ラピッドプロトタイプシステム構築を目指したFPGA－MCMの構成法},
 year = {1996}
}