{"updated":"2025-01-22T18:25:54.516686+00:00","links":{},"id":27653,"created":"2025-01-18T22:57:57.582123+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00027653","sets":["1164:2036:2084:2089"]},"path":["2089"],"owner":"1","recid":"27653","title":["プリント基板設計における非平面接続要求の部品下領域を利用した配線手法"],"pubdate":{"attribute_name":"公開日","attribute_value":"2000-01-12"},"_buckets":{"deposit":"991346ba-7b17-4463-8939-013ba23e6160"},"_deposit":{"id":"27653","pid":{"type":"depid","value":"27653","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"プリント基板設計における非平面接続要求の部品下領域を利用した配線手法","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"プリント基板設計における非平面接続要求の部品下領域を利用した配線手法"},{"subitem_title":"Heuristic Algorithms for Routing Nonplanar Connections through Areas under Elements in Printed Wiring Board Design","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2000-01-12","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"広島大学工学部第二類回路システム工学講座"},{"subitem_text_value":"広島大学工学部第二類回路システム工学講座"},{"subitem_text_value":"広島大学工学部第二類回路システム工学講座"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Department of Circuits and Systems, Faculty of Engineering, Hiroshima University","subitem_text_language":"en"},{"subitem_text_value":"Department of Circuits and Systems, Faculty of Engineering, Hiroshima University","subitem_text_language":"en"},{"subitem_text_value":"Department of Circuits and Systems, Faculty of Engineering, Hiroshima University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/27653/files/IPSJ-SLDM99094009.pdf"},"date":[{"dateType":"Available","dateValue":"2002-01-12"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM99094009.pdf","filesize":[{"value":"662.7 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"4ba2f6cb-bcad-42f3-a5cf-848125ba042b","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2000 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"高藤, 大介"},{"creatorName":"墨川, 新平"},{"creatorName":"渡邉, 敏正"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Daisuke, Takafuji","creatorNameLang":"en"},{"creatorName":"Sinpei, Sumikawa","creatorNameLang":"en"},{"creatorName":"Toshimasa, Watanabe","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本稿は，プリント基板配線における非平面接続数（一層設計ではジャンパー線数，多層設計ではビアを用いた異層間配線数）を少なくするために，部品下領域を利用した2つの配線手法RUEとEJを提案し，その性能を計算機実験により比較評価する．提案手法は，ともに混雑コストを辺コストあるいは点コストとするグラフモデル上での最短経路探索を用いている．実験ではRUEの方が平均3.8％程多く非平面接続を部品下に埋め込むことができ，さらに計算時間も格段に短いことが確かめられた．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"We propose two algorithms RUE and EJ routing nonplanar connections through areas under elements in printed wiring board design. Nonplanar connections represent jumpers in single-layered design or connection requirements among different layers through vias in multi-layered one. We compare their capability through experiment. Both algorithms repeat finding shortest paths of graphs with congestion costs as edge or vertex weights. It is shown that RUE can embed average 3.8% more nonplanar edges than that CPU time of RUE is 1/6.4 of that of EJ on average.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"72","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"65","bibliographicIssueDates":{"bibliographicIssueDate":"2000-01-12","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"2(1999-SLDM-094)","bibliographicVolumeNumber":"2000"}]},"relation_version_is_last":true,"weko_creator_id":"1"}}