{"id":27512,"updated":"2025-01-22T18:29:49.782051+00:00","links":{},"created":"2025-01-18T22:57:51.133819+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00027512","sets":["1164:2036:2073:2076"]},"path":["2076"],"owner":"1","recid":"27512","title":["動的命令変更機構を持つ組み込み向けJavaプロセッサの設計と評価"],"pubdate":{"attribute_name":"公開日","attribute_value":"2002-03-04"},"_buckets":{"deposit":"a3e83f54-dd84-46cd-9540-1b2985cc17d1"},"_deposit":{"id":"27512","pid":{"type":"depid","value":"27512","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"動的命令変更機構を持つ組み込み向けJavaプロセッサの設計と評価","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"動的命令変更機構を持つ組み込み向けJavaプロセッサの設計と評価"},{"subitem_title":"Design and Evaluation of Java Processor with Dynamic Instruction Conversion Mechanism for Embedded Systems","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2002-03-04","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"奈良先端科学技術大学院大学"},{"subitem_text_value":"奈良先端科学技術大学院大学"},{"subitem_text_value":"奈良先端科学技術大学院大学"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Nara Institute of Science and Technology","subitem_text_language":"en"},{"subitem_text_value":"Nara Institute of Science and Technology","subitem_text_language":"en"},{"subitem_text_value":"Nara Institute of Science and Technology","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/27512/files/IPSJ-SLDM01105005.pdf"},"date":[{"dateType":"Available","dateValue":"2004-03-04"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM01105005.pdf","filesize":[{"value":"128.9 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"2ace8831-59e5-42c8-91fc-dab145acb5e0","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2002 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"鈴木, 真人"},{"creatorName":"木村, 晋二"},{"creatorName":"渡邉, 勝正"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Masato, Suzuki","creatorNameLang":"en"},{"creatorName":"Shinji, Kimura","creatorNameLang":"en"},{"creatorName":"Katsumasa, Watanabe","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"近年，携帯情報端末に Java の実行環境を搭載することが一般的になりつつある．Java バイトコードを直接実行できる Java プロセッサはソフトウェアと比較して実行速度及び省メモリ性に優れており，組み込み分野への応用が期待されている．ここでは，Javaプロセッサの実行効率を向上するための手法として，動的命令変更機構を提案し，その評価を行なう．Javaでは演算の前後にスタック操作が必要となるが，バイトコード実行中にこれらの命令列をRISC型の拡張命令に動的に変更して命令キャッシュを書き換えることで，繰り返し実行での効率を向上させる．この動的命令変更機構を付加した Java プロセッサを設計し，その性能評価を行なう．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"Java processors are key for executing Java bytecodes in embedded systems, and are expected low hardware consumption and high execution efficiency. Inthe paper, we propose a dynamic instruction conversion mechanism for a Java processor. Java bytecode is based on stack operations, and we can raise the efficiency by changing these codes into extended codes corresponding to RISC-like operations. Rewriting is done in cache and done in parallel with the direct execution of bytecode. By performing the execution and the conversion in parallel, we can manipulate complex conversions with low hardware cost. The paper shows the design and evaluation of the Java processor with the dynamic instruction conversion mechanism.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"40","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"33","bibliographicIssueDates":{"bibliographicIssueDate":"2002-03-04","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"18(2001-SLDM-105)","bibliographicVolumeNumber":"2002"}]},"relation_version_is_last":true,"weko_creator_id":"1"}}