{"id":27331,"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00027331","sets":["1164:2036:2061:2066"]},"path":["2066"],"owner":"1","recid":"27331","title":["リコンフィギャラブルプロセッサDRP上でのエッジ近傍合成機能付きαブレンダの実装"],"pubdate":{"attribute_name":"公開日","attribute_value":"2004-01-22"},"_buckets":{"deposit":"b38b8f86-0d74-4100-b2e5-9910dbc1d2da"},"_deposit":{"id":"27331","pid":{"type":"depid","value":"27331","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"リコンフィギャラブルプロセッサDRP上でのエッジ近傍合成機能付きαブレンダの実装","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"リコンフィギャラブルプロセッサDRP上でのエッジ近傍合成機能付きαブレンダの実装"},{"subitem_title":"Implementation of Anti-aliasing Alpha Blender on the Reconfigurable Processor DRP","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2004-01-22","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"慶応義塾大学大学院理工学研究科"},{"subitem_text_value":"慶応義塾大学大学院理工学研究科"},{"subitem_text_value":"慶応義塾大学大学院理工学研究科"},{"subitem_text_value":"NECエレクトロニクス株式会社"},{"subitem_text_value":"NECマルチメディア研究所"},{"subitem_text_value":"慶応義塾大学大学院理工学研究科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"NEC Electronics Corporation","subitem_text_language":"en"},{"subitem_text_value":"NEC Multimedia Research Laboratories","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/27331/files/IPSJ-SLDM03113007.pdf"},"date":[{"dateType":"Available","dateValue":"2006-01-22"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM03113007.pdf","filesize":[{"value":"482.8 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"cc324a6b-ef47-4080-a0b0-4e1870a5e953","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2004 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"鈴木, 正康"},{"creatorName":"山田, 裕"},{"creatorName":"出口, 勝昭"},{"creatorName":"安生健一郎"},{"creatorName":"粟島, 亨"},{"creatorName":"天野, 英晴"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Masayasu, Suzuki","creatorNameLang":"en"},{"creatorName":"Yutaka, Yamada","creatorNameLang":"en"},{"creatorName":"Katsuaki, Deguchi","creatorNameLang":"en"},{"creatorName":"Kenichiro, Anjo","creatorNameLang":"en"},{"creatorName":"Toru, Awashima","creatorNameLang":"en"},{"creatorName":"Hideharu, Amano","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"NECエレクトロニクスが開発したDynamically Reconfigurable Processor （DRP）は、粗粒度のリコンフィギャラブルプロセッサで、内部に持つ16のデータパスの構成情報を切替えることによって、様々な処理を実現する。本稿では、リコンフィギャラブルプロセッサDRP上でのエッジ近傍合成機能付きαブレンダの設計事例を紹介し、DRPの処理能力を検証するため、Pentium 4、Athlon XP、DSP（TI C6713）などのアーキテクチャと比較した。その結果、並列処理の効果的な利用により，エッジ近傍合成機能付きαブレンダを実行した場合、DRPはPentium 4、Athlon XPの3倍、DSPの17倍の処理性能を達成することができた。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"Dynamically Reconfigurable Processor (DRP) developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixteen circuit configurations, or contexts, to implement different logic on one single DRP chip. This paper describes our implementation of an alpha blender with anti-aliasing capabilities on the DRP. Comparison with various architectures including Pentium 4, Athlon XP, and DSPs (TI C6713) are done to evaluate the potentials of the DRP. Our results show that the DRP outperforms Pentium 4 and Athlon XP by three times, and DSP by seventeen times when compared against the implementation of anti-aliasing alpha blender.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"40","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"35","bibliographicIssueDates":{"bibliographicIssueDate":"2004-01-22","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"5(2003-SLDM-113)","bibliographicVolumeNumber":"2004"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"updated":"2025-01-22T18:34:32.673266+00:00","created":"2025-01-18T22:57:43.137868+00:00","links":{}}