{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00027228","sets":["1164:2036:2061:2062"]},"path":["2062"],"owner":"1","recid":"27228","title":["A Cost - effective Technique to Mitigate Soft Errors in Logic Circuits"],"pubdate":{"attribute_name":"公開日","attribute_value":"2004-12-01"},"_buckets":{"deposit":"d69e9956-3ea5-45e9-bd80-df75a93631da"},"_deposit":{"id":"27228","pid":{"type":"depid","value":"27228","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"A Cost - effective Technique to Mitigate Soft Errors in Logic Circuits","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"A Cost - effective Technique to Mitigate Soft Errors in Logic Circuits"},{"subitem_title":"A Cost - effective Technique to Mitigate Soft Errors in Logic Circuits","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2004-12-01","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Information Science and Technology  The University of Tokyo"},{"subitem_text_value":"Graduate School of Information Science and Technology  The University of Tokyo"},{"subitem_text_value":"Graduate School of Information Science and Technology  The University of Tokyo"},{"subitem_text_value":"Graduate School of Information Science and Technology  The University of Tokyo"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Information Science and Technology, The University of Tokyo","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Science and Technology, The University of Tokyo","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Science and Technology, The University of Tokyo","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Information Science and Technology, The University of Tokyo","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/27228/files/IPSJ-SLDM04117006.pdf"},"date":[{"dateType":"Available","dateValue":"2006-12-01"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM04117006.pdf","filesize":[{"value":"929.8 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"a053271e-e6dd-456e-be01-714c1c560dac","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2004 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"LuongD.HUNG"},{"creatorName":"Masanori, TAKADA"},{"creatorName":"Yi, GE"},{"creatorName":"Shuichi, SAKAI"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Luong, D.Hung","creatorNameLang":"en"},{"creatorName":"Masanori, Takada","creatorNameLang":"en"},{"creatorName":"Yi, Ge","creatorNameLang":"en"},{"creatorName":"Shuichi, Sakai","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"The soft error rates (SER) in logic circuits increase quickly as devices scale. Existing techniques to mitigate soft errors in logic circuits often incur large overheads. In this work  we propose a 'lightweight' technique that detects soft errors in logic circuits  utilizing the concept of temporal sampling. The technique adds some modifications to the conventional pipeline to allow data to be sampled twice in time and compared for integrity. The area  power  and timing overheads of modifying a 32-bit multiplier to support the technique are respectively 19.3%  7.6%  and 6.4%. Comparing to existing soft error detection circuit techniques  our technique incurs lower overheads  The technique is also applicable in scaled process technologies.","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"The soft error rates (SER) in logic circuits increase quickly as devices scale. Existing techniques to mitigate soft errors in logic circuits often incur large overheads. In this work, we propose a 'lightweight' technique that detects soft errors in logic circuits, utilizing the concept of temporal sampling. The technique adds some modifications to the conventional pipeline to allow data to be sampled twice in time and compared for integrity. The area, power, and timing overheads of modifying a 32-bit multiplier to support the technique are respectively 19.3%, 7.6%, and 6.4%. Comparing to existing soft error detection circuit techniques, our technique incurs lower overheads, The technique is also applicable in scaled process technologies.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"36","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"31","bibliographicIssueDates":{"bibliographicIssueDate":"2004-12-01","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"122(2004-SLDM-117)","bibliographicVolumeNumber":"2004"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"id":27228,"updated":"2025-01-22T18:36:47.824367+00:00","links":{},"created":"2025-01-18T22:57:38.546727+00:00"}