{"updated":"2025-01-22T18:36:41.848260+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00027225","sets":["1164:2036:2061:2062"]},"path":["2062"],"owner":"1","recid":"27225","title":["専用プロセッサの命令セット評価の高速化手法"],"pubdate":{"attribute_name":"公開日","attribute_value":"2004-12-01"},"_buckets":{"deposit":"d6cc08a5-8968-40b8-8547-2e7d37287814"},"_deposit":{"id":"27225","pid":{"type":"depid","value":"27225","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"専用プロセッサの命令セット評価の高速化手法","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"専用プロセッサの命令セット評価の高速化手法"},{"subitem_title":"Rapid Instruction Set Evaluation for Application Specific Processor","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2004-12-01","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"埼玉大学大学院理工学研究科電気電子システム工学専攻"},{"subitem_text_value":"埼玉大学大学院理工学研究科電気電子システム工学専攻"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Department of Electrical and Electronic Systems, Saitama University","subitem_text_language":"en"},{"subitem_text_value":"Department of Electrical and Electronic Systems, Saitama University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/27225/files/IPSJ-SLDM04117003.pdf"},"date":[{"dateType":"Available","dateValue":"2006-12-01"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM04117003.pdf","filesize":[{"value":"785.9 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"6d8b0005-51dd-4460-b0db-b3a74596d96d","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2004 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"増田, 雅由"},{"creatorName":"伊藤和人"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Masayuki, Masuda","creatorNameLang":"en"},{"creatorName":"Kazuhito, Ito","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"プロセッサの命令セット選択は，プロセッサハードウェアとソフトウェア実行に対して，速度，面積，電力の面で大きな影響を及ぼす．アプリケーションに特化したプロセッサの設計において，精度の高い命令セット評価を行うことが重要である．本論文では，与えられたアプリケーションに対して高精度な命令セット評価を高速に行う手法を提案する．実験により，提案する手法が効率的に命令セットを評価することを示す．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"The selection of instruction set of a processor greatly influences the processor hardware and execution of software in speed, area and power. Evaluation of instruction set is an important task in designing a processor specific to a given application. In this paper, a technique to rapidly and precisely evaluate instruction sets for the given application is proposed. The results show the proposed technique efficiently evaluate instruction sets for assumed processor hardware.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"18","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"13","bibliographicIssueDates":{"bibliographicIssueDate":"2004-12-01","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"122(2004-SLDM-117)","bibliographicVolumeNumber":"2004"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"created":"2025-01-18T22:57:38.416373+00:00","id":27225,"links":{}}