{"updated":"2025-01-22T18:38:30.802385+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00027209","sets":["1164:2036:2055:2060"]},"path":["2060"],"owner":"1","recid":"27209","title":["並列可視化処理向けFPGA搭載PCIカードへのボリュームレンダリングの予備実装"],"pubdate":{"attribute_name":"公開日","attribute_value":"2005-01-26"},"_buckets":{"deposit":"27192407-2b08-433d-be63-fdbb24b2ad32"},"_deposit":{"id":"27209","pid":{"type":"depid","value":"27209","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"並列可視化処理向けFPGA搭載PCIカードへのボリュームレンダリングの予備実装","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"並列可視化処理向けFPGA搭載PCIカードへのボリュームレンダリングの予備実装"},{"subitem_title":"Preliminary Implementation of Volume Rendering Circuit onto an FPGA-based Visualization Accelerator","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2005-01-26","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"京都大学大学院情報学研究科"},{"subitem_text_value":"京都大学大学院情報学研究科"},{"subitem_text_value":"京都大学大学院情報学研究科"},{"subitem_text_value":"京都大学大学院経済学研究科"},{"subitem_text_value":"京都大学大学院情報学研究科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Informatics Kyoto University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Informatics Kyoto University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Informatics Kyoto University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Economics Kyoto University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Informatics Kyoto University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/27209/files/IPSJ-SLDM04118014.pdf"},"date":[{"dateType":"Available","dateValue":"2007-01-26"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM04118014.pdf","filesize":[{"value":"920.4 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"b7b6671a-b2b8-4986-8f44-bc6005dc01c7","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2005 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"岡村, 大"},{"creatorName":"五島, 正裕"},{"creatorName":"森, 眞一郎"},{"creatorName":"中島, 康彦"},{"creatorName":"冨田, 眞治"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Dai, Okamura","creatorNameLang":"en"},{"creatorName":"Masahiro, Goshima","creatorNameLang":"en"},{"creatorName":"Shin-ichiro, Mori","creatorNameLang":"en"},{"creatorName":"Yasuhiko, Nakashima","creatorNameLang":"en"},{"creatorName":"Shinji, Tomita","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"本稿では、Dual LinkのDVI-D入出力インターフェースとDDR-SDRAMを2系統搭載し、高いメモリバンド幅を要求する並列画像向けに開発したFPGA搭載PCIカードを紹介する。また、その具体的な応用として、並列ボリュームレンダリング向けの専用アクセラレータをこのボードに実装する構想を述べ、その簡易版として制作したボリュームレンダリング回路の紹介を行う。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"This paper introduces an FPGA-based PCIcard for Parallel Visualization of Large Volume Data. In order to implement memory intensive image/vision processing applications, like parallel volume rendering, this card is configured with DVI-D Dual Link Input/Output interfaces and two independent channels of DDR-SDRAM. Then we show our preliminary implementation of a simple volume rendering circuit onto the PCIcard.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"80","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"75","bibliographicIssueDates":{"bibliographicIssueDate":"2005-01-26","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"8(2004-SLDM-118)","bibliographicVolumeNumber":"2005"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"created":"2025-01-18T22:57:37.715857+00:00","id":27209,"links":{}}