{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00027088","sets":["1164:2036:2049:2054"]},"path":["2054"],"owner":"1","recid":"27088","title":["FPGAを用いた生化学シミュレータReCSiPにおけるハードウェアリソース消費に関する考察"],"pubdate":{"attribute_name":"公開日","attribute_value":"2006-01-18"},"_buckets":{"deposit":"3f0c544c-c6a3-47b8-98cb-4126827c7292"},"_deposit":{"id":"27088","pid":{"type":"depid","value":"27088","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"FPGAを用いた生化学シミュレータReCSiPにおけるハードウェアリソース消費に関する考察","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"FPGAを用いた生化学シミュレータReCSiPにおけるハードウェアリソース消費に関する考察"},{"subitem_title":"Hardware-resource Utilization Analysis on an FPGA-Based Biochemical Simulator ReCSiP","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2006-01-18","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"慶應義塾大学大学院理工学研究科"},{"subitem_text_value":"慶應義塾大学大学院理工学研究科"},{"subitem_text_value":"慶應義塾大学大学院理工学研究科"},{"subitem_text_value":"慶應義塾大学理工学部情報工学科"},{"subitem_text_value":"慶應義塾大学理工学部情報工学科"},{"subitem_text_value":"科学技術振興機構北野共生システムプロジェクト"},{"subitem_text_value":"科学技術振興機構北野共生システムプロジェクト"},{"subitem_text_value":"長崎大学工学部情報システムエ学科"},{"subitem_text_value":"長崎大学工学部情報システムエ学科"},{"subitem_text_value":"科学技術振興機構北野共生システムプロジェクト"},{"subitem_text_value":"慶應義塾大学大学院理工学研究科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Department of Information and Computer Science, Faculty of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Department of Information and Computer Science, Faculty of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Department of Information and Computer Science, Faculty of Science and Technology, Keio University","subitem_text_language":"en"},{"subitem_text_value":"Kitano Symbiotic Project, ERATO-SORST, Japan Science and Technology Corporation","subitem_text_language":"en"},{"subitem_text_value":"Kitano Symbiotic Project, ERATO-SORST, Japan Science and Technology Corporation","subitem_text_language":"en"},{"subitem_text_value":"Department of Computer and Information Scienecs, Nagasaki University","subitem_text_language":"en"},{"subitem_text_value":"Department of Computer and Information Scienecs, Nagasaki University","subitem_text_language":"en"},{"subitem_text_value":" Kitano Symbiotic Project, ERATO-SORST, Japan Science and Technology Corporation","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Science and Technology, Keio University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/27088/files/IPSJ-SLDM06123020.pdf"},"date":[{"dateType":"Available","dateValue":"2008-01-18"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM06123020.pdf","filesize":[{"value":"313.5 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"2805a2be-a193-4afc-a9bc-d34706bb6d42","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2006 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"長名, 保範"},{"creatorName":"吉見, 真聡"},{"creatorName":"岩岡, 洋"},{"creatorName":"小嶋, 利紀"},{"creatorName":"西川, 由理"},{"creatorName":"舟橋, 啓"},{"creatorName":"広井, 賀子"},{"creatorName":"柴田, 裕一郎"},{"creatorName":"岩永, 直樹"},{"creatorName":"北野, 宏明"},{"creatorName":"天野, 英晴"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Yasunori, OSANA","creatorNameLang":"en"},{"creatorName":"Masato, YOSHIMI","creatorNameLang":"en"},{"creatorName":"Yow, IWAOKA","creatorNameLang":"en"},{"creatorName":"Toshinori, KOJIMA","creatorNameLang":"en"},{"creatorName":"Yuri, NISHIKAWA","creatorNameLang":"en"},{"creatorName":"Akira, FUNAHASHI","creatorNameLang":"en"},{"creatorName":"Noriko, HIROI","creatorNameLang":"en"},{"creatorName":"Yuichiro, SHIBATA","creatorNameLang":"en"},{"creatorName":"Naoki, IWANAGA","creatorNameLang":"en"},{"creatorName":"Hiroaki, KITANO","creatorNameLang":"en"},{"creatorName":"Hideharu, AMANO","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"集積回路の集積度の向上にともない、FPGAの回路容量が拡大し、近年ではFPGAを用いた浮動小数点演算による科学技術計算の高速化が注目を集めている。DSPにも浮動小数点演算の可能なものが増加しており、近い将来FPGAのような汎用のリコンフイギャラブルデバイスが浮動小数点演算器をハードマクロとして内蔵することも考えられる。本稿では、浮動小数点演算器を内蔵するようなreconfigurable deviceの構成を検討するために、FPGAを用いた生化学シミュレータの実装を元に、ふたつの実装例から回路面積のプロファイリングを行い、浮動小数点演算に使用されている面積と、それ以外の制御などに用いられている面積の割合を数値化した結果を示す。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"Progress in LSI manufacturing technology is expanding circuit capacity of FPGAs steadily. This enabled floating-point arithmetics on FPGA, to accelerate scientific/technical applications. As recent DSPs are incorporating floating-point arithmetic units, FPGAs may do same thing in near future. This paper shows the circuit-area profile of two types of biochemical simulators, to consider the structure of future FPGAs with embedded FP capability.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"118","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"113","bibliographicIssueDates":{"bibliographicIssueDate":"2006-01-18","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"4(2006-SLDM-123)","bibliographicVolumeNumber":"2006"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"id":27088,"updated":"2025-01-22T18:42:42.524879+00:00","links":{},"created":"2025-01-18T22:57:32.318919+00:00"}