{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00026982","sets":["1164:2036:2049:2050"]},"path":["2050"],"owner":"11","recid":"26982","title":["［特別講演］System Verilogチユートリアル"],"pubdate":{"attribute_name":"公開日","attribute_value":"2006-11-29"},"_buckets":{"deposit":"b64ba315-f9fb-4369-bb36-af5289586417"},"_deposit":{"id":"26982","pid":{"type":"depid","value":"26982","revision_id":0},"owners":[11],"status":"published","created_by":11},"item_title":"［特別講演］System Verilogチユートリアル","author_link":["458567","458556","458551","458555","458561","458564","458563","458572","458568","458558","458557","458560","458559","458552","458571","458566","458570","458554","458562","458553","458565","458569"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"［特別講演］System Verilogチユートリアル"},{"subitem_title":"[Special Lecture] SystemVerilog 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Group which is formed by members from ten companies under the Standardization Support Sub-Committee of EDA Technical Committee, JEITA (Japan Electronics and Information Technology Industries Association) will present a tutorial style lecture of two feature of SystemVerilog; \"design construct\" and \"assertion\" in the \"verification construct\".","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"101","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"89","bibliographicIssueDates":{"bibliographicIssueDate":"2006-11-29","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"126(2006-SLDM-127)","bibliographicVolumeNumber":"2006"}]},"relation_version_is_last":true,"weko_creator_id":"11"},"id":26982,"updated":"2025-01-19T23:36:06.738978+00:00","links":{},"created":"2025-01-18T22:57:27.478383+00:00"}