{"links":{},"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00026748","sets":["1164:2036:2037:2038"]},"path":["2038"],"owner":"1","recid":"26748","title":["クロスバスイッチを用いたS-Box切替によるAES暗号処理回路のパワーマスキング手法"],"pubdate":{"attribute_name":"公開日","attribute_value":"2008-11-10"},"_buckets":{"deposit":"92d1279a-72e9-498e-aebe-10002307551b"},"_deposit":{"id":"26748","pid":{"type":"depid","value":"26748","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"クロスバスイッチを用いたS-Box切替によるAES暗号処理回路のパワーマスキング手法","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"クロスバスイッチを用いたS-Box切替によるAES暗号処理回路のパワーマスキング手法"},{"subitem_title":"A Power Masking Method of AES Circuit by Using Cross Bar Switch to Switch S-Box Circuit.","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2008-11-10","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"早稲田大学大学院基幹理工学研究科情報理工学専攻"},{"subitem_text_value":"早稲田大学大学院基幹理工学研究科情報理工学専攻"},{"subitem_text_value":"早稲田大学大学院基幹理工学研究科情報理工学専攻"},{"subitem_text_value":"早稲田大学大学院基幹理工学研究科情報理工学専攻"},{"subitem_text_value":"早稲田大学大学院基幹理工学研究科情報理工学専攻"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"},{"subitem_text_value":"Dept. of Computer Science and Engineering, Waseda University","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/26748/files/IPSJ-SLDM08137011.pdf"},"date":[{"dateType":"Available","dateValue":"2010-11-10"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM08137011.pdf","filesize":[{"value":"822.9 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"71da215d-312e-4bb2-b5cf-ae39b7f5f14a","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2008 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"川畑, 伸幸"},{"creatorName":"奈良, 竜太"},{"creatorName":"戸川, 望"},{"creatorName":"柳澤, 政生"},{"creatorName":"大附, 辰夫"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Nobuyuki, Kawahata","creatorNameLang":"en"},{"creatorName":"Ryuta, Nara","creatorNameLang":"en"},{"creatorName":"Nozomu, Togawa","creatorNameLang":"en"},{"creatorName":"Masao, Yanagisawa","creatorNameLang":"en"},{"creatorName":"Tatsuo, Ohtsuki","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"共通鍵暗号規格の一つである AES は専用処理ハードウェアが搭載された IC チップ等の組込み機器上での使用例が多く，格納された共通鍵は外部に対して秘密であることが前提とされている．しかし，暗号処理演算中に発生する物理量を解析して共通鍵を解読するサイドチャネル攻撃と呼ばれる攻撃法が提案されその危険性が指摘されている．中でも電力差分解析攻撃 (DPA) は最も危険性が懸念されている攻撃法の一つであり，DPA への耐性を考慮した専用ハードウェアの設計が要求されている．本稿では， AES の SubBytes 処理にて複数の S-Box 回路を用いて並列処理させる場合に，クロスバスイッチを用いて消費電力の異なる複数の S-Box をランダムで切り替え消費電力を攪枠する手法を提案する．提案手法の実装をして評価および結果を報告する．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"AES is one of the common key cryptosystems often used on an embedded systems, IC-chips and others. Teir common key must be kept secret from others. However, it can be deciphered by side channel attack, the method of cracking cryptosystems by analyzing physical quantity generated at the encryption processing. Especially in side channel attack, differential power analysis (DPA) is known as the most dangerous attacking method. AES circuit is needed to be designd with regard to anti-DPA. To design an anti-DPA AES circuit, we propose a power masking SubBytes circuit which switches several S-Boxes, each of which has a different power to each other. We demonstrate our evaluation and results. ","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"66","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告システムLSI設計技術（SLDM）"}],"bibliographicPageStart":"61","bibliographicIssueDates":{"bibliographicIssueDate":"2008-11-10","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"111(2008-SLDM-137)","bibliographicVolumeNumber":"2008"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"created":"2025-01-18T22:57:17.126282+00:00","updated":"2025-01-22T18:52:27.420813+00:00","id":26748}