{"created":"2025-01-18T22:55:45.134836+00:00","updated":"2025-01-22T19:48:46.338067+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00024675","sets":["1164:1579:1701:1713"]},"path":["1713"],"owner":"1","recid":"24675","title":["高速アクセスメモリ QRAM"],"pubdate":{"attribute_name":"公開日","attribute_value":"1990-01-25"},"_buckets":{"deposit":"5dc0bb31-abe9-4fd3-b16a-e49f140772b7"},"_deposit":{"id":"24675","pid":{"type":"depid","value":"24675","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"高速アクセスメモリ QRAM","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"高速アクセスメモリ QRAM"},{"subitem_title":"Quick Access Memory QRAM","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"1990-01-25","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"日本アイ・ビー・エム東京基礎研究所"},{"subitem_text_value":"日本アイ・ビー・エム東京基礎研究所"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"IBM Reserch, Tokyo Research Laboratory, IBM Japan, Ltd.","subitem_text_language":"en"},{"subitem_text_value":"IBM Reserch, Tokyo Research Laboratory, IBM Japan, Ltd.","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/24675/files/IPSJ-ARC89080006.pdf"},"date":[{"dateType":"Available","dateValue":"1992-01-25"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC89080006.pdf","filesize":[{"value":"839.2 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"f4389580-dc0e-498d-8497-8fffbe70164d","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 1990 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"大庭, 信之"},{"creatorName":"新島, 秀人"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Nobuyuki, Ooba","creatorNameLang":"en"},{"creatorName":"Hideto, Niijima","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"マイクロプロセッサとメモリの速度ギャップを短縮するため、チップ内にアドレス比較器と、マイクロプロセッサと直接ハンドシェイクするメカニズムを搭載した新しいメモリ、QRAMを提案する。本稿では、まずQRAMの内部構造上の特長であるマルチアクティブアイランドと、QRAMを用いたシステムの構成法について述べる。次に、トレースデータを用いたシミュレーションによるQRAMの性能評価を、特にキャッシュとの比較を中心に報告する。コストと性能の点から、QRAMは比較的ローエンドのワークステーションに応用できると思われる。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"This report discusses a new memory architecture QRAM, that is designed to bridge the speed gap between the microprocessor and the main memory with high cost-performance. For high performance and useability, QRAM has two features, a built-in handshake facility and a multiple active island structure. We describe the hardware configuration of the QRAM and its operation. We compared the QRAM's performance with standard caches' by trace-driven simulations. According to its cost and performance, it will be applicable to low-end workstations.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"48","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告計算機アーキテクチャ(ARC)"}],"bibliographicPageStart":"41","bibliographicIssueDates":{"bibliographicIssueDate":"1990-01-25","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"7(1989-ARC-080)","bibliographicVolumeNumber":"1990"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"id":24675,"links":{}}