{"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00024643","sets":["1164:1579:1701:1707"]},"path":["1707"],"owner":"1","recid":"24643","title":["64ビットRISC型マイクロプロセッサ（MN10501）とその故障解析手法"],"pubdate":{"attribute_name":"公開日","attribute_value":"1990-06-22"},"_buckets":{"deposit":"830ff9b3-d8de-4b70-a072-dfbac3e68360"},"_deposit":{"id":"24643","pid":{"type":"depid","value":"24643","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"64ビットRISC型マイクロプロセッサ（MN10501）とその故障解析手法","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"64ビットRISC型マイクロプロセッサ（MN10501）とその故障解析手法"},{"subitem_title":"64 - BIT RISC MICROPROCESSOR (MN10501) AND ITS TESTING AND DEBUGGING METHOD","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"1990-06-22","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"松下電器産業（株）半導体研究センター超LSIデバイス研究所"},{"subitem_text_value":"松下電器産業（株）半導体研究センター超LSIデバイス研究所"},{"subitem_text_value":"松下電器産業（株）半導体研究センター超LSIデバイス研究所"},{"subitem_text_value":"松下電器産業（株）半導体研究センター超LSIデバイス研究所"},{"subitem_text_value":"松下電器産業（株）半導体研究センター超LSIデバイス研究所"},{"subitem_text_value":"松下電器産業（株）半導体研究センター超LSIデバイス研究所"},{"subitem_text_value":"松下電器産業（株）半導体研究センター超LSIデバイス研究所"},{"subitem_text_value":"松下電器産業（株）半導体研究センター超LSIデバイス研究所"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Semiconductor Research Center Matsushita Electrical Industrial Co., Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Semiconductor Research Center Matsushita Electrical Industrial Co., Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Semiconductor Research Center Matsushita Electrical Industrial Co., Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Semiconductor Research Center Matsushita Electrical Industrial Co., Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Semiconductor Research Center Matsushita Electrical Industrial Co., Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Semiconductor Research Center Matsushita Electrical Industrial Co., Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Semiconductor Research Center Matsushita Electrical Industrial Co., Ltd.","subitem_text_language":"en"},{"subitem_text_value":"Semiconductor Research Center Matsushita Electrical Industrial Co., Ltd.","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/24643/files/IPSJ-ARC90062003.pdf"},"date":[{"dateType":"Available","dateValue":"1992-06-22"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC90062003.pdf","filesize":[{"value":"759.0 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"ff47483e-6207-45bf-b96c-5041dac19a54","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 1990 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"勝連城二"},{"creatorName":"永久, 龍彦"},{"creatorName":"山本, 崇夫"},{"creatorName":"長岡, 恭弘"},{"creatorName":"米澤, 浩和"},{"creatorName":"冨田, 泰弘"},{"creatorName":"渡里, 滋"},{"creatorName":"國信, 茂郎"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Joji, Katsura","creatorNameLang":"en"},{"creatorName":"Tatsuhiko, Nagahisa","creatorNameLang":"en"},{"creatorName":"Takao, Yamamoto","creatorNameLang":"en"},{"creatorName":"Yasuhiro, Nagaoka","creatorNameLang":"en"},{"creatorName":"Hirokazu, Yonezawa","creatorNameLang":"en"},{"creatorName":"Yasuhiro, Tomita","creatorNameLang":"en"},{"creatorName":"Shigeru, Watari","creatorNameLang":"en"},{"creatorName":"Shigeo, Kuninobu","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"RISC型マイクロプロセッサ(105)は、SPARCアーキテクチャを採用した64ビットMPUでその高機能化及び高集積化を実現することにより1チップ内のトランジスタ数は約100万個に達する。その内部は、整数演算、浮動小数点演算、命令キャッシュ、データキャッシュ、メモリ管理及びバスコントロールの6個の機能モジュールから構成され、40MHzの動作周波数で、40MIPS/20MFLOPSのピーク性能を達成している。このような大規模なチップの開発において我々は、テスト容易化設計によるテスティングの効率化や高速な内部信号のタイミングの検益のための新たな故障解析手法を採用し、さらにMPUのテス卜・デバッグをより効率的にかつ高度に解析可能な環境としてEBテスタを中心とするテスト・デバッグシステムを構築した。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"RISC microprocessor (MN10501) is a 64-bit MPU with SPARC architecture Which contains about 1,000,000 transistors in a diearea by high performance and high integration. It consists of an integer unit (I U), a floating-point unit (FPU), a memory management unit (MMU), a data cache unit (DCU), an instruction cache unit (ICU) and a bus control unit (BCU), and realizes 40MIPS and 20 MFLOPS peak performance at 40 MHz. In the development or this VLSI, we have realized the efficiency of testing by designs for testability and that of fault analysis by verifying the timming of high speed signals in the chip and, moreover constructed a testing and debugging system environment which uses an EB tester efficiently.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"6","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"1990-06-22","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"51(1990-ARC-062)","bibliographicVolumeNumber":"1990"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"id":24643,"updated":"2025-01-22T19:49:47.515382+00:00","links":{},"created":"2025-01-18T22:55:43.710787+00:00"}