{"created":"2025-01-18T22:55:33.523669+00:00","metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00024415","sets":["1164:1579:1680:1683"]},"path":["1683"],"owner":"1","recid":"24415","title":["信号処理におけるバス結合型と多段結合網型の並列計算機の性能比較"],"pubdate":{"attribute_name":"公開日","attribute_value":"1992-08-19"},"_buckets":{"deposit":"b9e7e549-b5e6-43b7-acac-2ca1afcbd93e"},"_deposit":{"id":"24415","pid":{"type":"depid","value":"24415","revision_id":0},"owners":[1],"status":"published","created_by":1},"item_title":"信号処理におけるバス結合型と多段結合網型の並列計算機の性能比較","author_link":["0","0"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"信号処理におけるバス結合型と多段結合網型の並列計算機の性能比較"},{"subitem_title":"Performance Evaluation of Signal Processing on Two Shared Memory Multiprocessors","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"1992-08-19","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"三菱電機（株）情報電子研究所"},{"subitem_text_value":"三菱電機（株）情報電子研究所"},{"subitem_text_value":"三菱電機（株）情報電子研究所"},{"subitem_text_value":"三菱電機（株）情報電子研究所"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Mitsubishi Electric Corporation Computer & Information Systems Laboratory","subitem_text_language":"en"},{"subitem_text_value":"Mitsubishi Electric Corporation Computer & Information Systems Laboratory","subitem_text_language":"en"},{"subitem_text_value":"Mitsubishi Electric Corporation Computer & Information Systems Laboratory","subitem_text_language":"en"},{"subitem_text_value":"Mitsubishi Electric Corporation Computer & Information Systems Laboratory","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/24415/files/IPSJ-ARC92095007.pdf"},"date":[{"dateType":"Available","dateValue":"1994-08-19"}],"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-ARC92095007.pdf","filesize":[{"value":"1.3 MB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"660","billingrole":"5"},{"tax":["include_tax"],"price":"330","billingrole":"6"},{"tax":["include_tax"],"price":"0","billingrole":"16"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_date","version_id":"09c40b0c-5b87-473f-a0ec-b7fb80359be5","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 1992 by the Information Processing Society of Japan"}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"水野, 政治"},{"creatorName":"宮田, 裕行"},{"creatorName":"磯西, 徹明"},{"creatorName":"菅, 隆志"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Masaji, Mizuno","creatorNameLang":"en"},{"creatorName":"Hiroyuki, Miyata","creatorNameLang":"en"},{"creatorName":"Tetsuaki, Isonishi","creatorNameLang":"en"},{"creatorName":"Takashi, Kan","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AN10096105","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"並列計算機の処理性能は、そのアーキテクチャと対象とするプログラムの形態に依存する。本論文では、特に実際に使用されている信号処理のアプリケーションを取り上げ、バス結合型と多段結合網型の二つのアーキテクチャにおける処理性能を比較した。その結果、最終的にはほぼ同等の性能が得られたが、バス結合型におけるメモリやバスの競合による性能低下、多段結合網型におけるプログラミング上の問題点等、各アーキテクチャにおける信号処理特有の特徴が明らかになった。","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"The performance of a multiprocessor system depends heavily on its architecture and the executing application programs. In this project, we compare the performance of signal processing program on two multiprocessors having different architecture-one with a common bus, and the other with a multistage interconnection network. Final results demonstrate performance similarities between the two systems. We will present these similarities, and also analyze each system's specific behavior in response to the application.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"56","bibliographic_titles":[{"bibliographic_title":"情報処理学会研究報告計算機アーキテクチャ（ARC）"}],"bibliographicPageStart":"49","bibliographicIssueDates":{"bibliographicIssueDate":"1992-08-19","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"64(1992-ARC-095)","bibliographicVolumeNumber":"1992"}]},"relation_version_is_last":true,"weko_creator_id":"1"},"links":{},"id":24415,"updated":"2025-01-22T19:55:40.516341+00:00"}