@techreport{oai:ipsj.ixsq.nii.ac.jp:00024278,
 author = {岩井原, 瑞穂 and 山家, 陽 and 中川, 智水 and 國貞, 勝弘 and 斎藤, 靖彦 and 永浦, 渉 and 池, 兼次郎 and 中村, 秀一 and 山田, 哲也 and 村上, 和彰 and 安浦, 寛人 and Mizuho, Iwaihara and Akira, Yamaga and Tomomi, Nakagawa and Katuhiro, Kunisada and Yasuhiko, Saitoh and Wataru, Nagaura and Kenjiro, Ike and Shuichi, Nakamura and Tetsuya, Yamada and Kazuaki, Murakami and Hiroto, Yasuura},
 issue = {111(1993-ARC-103)},
 month = {Dec},
 note = {計算機工学教育用32ビットRISC型マイクロプロセッサQP?DLX　(ushu　University　Education?Purpose　DLX　Microprocess)の開発プロジェクトにおける，ハードウェア記述言語SFLによる設計の過程を報告する．QP?DLXの開発環境，設計結果，CADベンチマークとしての設計データの公開，QP?DLXを用いたマイクロプロセッサ設計演習の構想について述べる．, We report our design experience and design process of the developing project of QP-DLX (Kyushu University Education-Purpose DLX Microprocessor), which is a 32-bit RISC microprocessor especially suited for educating software/hardware courses. We describe design results on the hardware description language SFL, our design environments, usage of QP-DLX design data as a CAD benchmark set, and our plan for a microprocessor design course using QP-DLX.},
 title = {教育用計算機QP - DLXの開発と開発環境},
 year = {1993}
}