Energy-Efficient FPGA-Based Implementation of HARK for Sound Source Localization

• Item type: Symposium(1)
• 公開日: 2024-12-27
• タイトル: Energy-Efficient FPGA-Based Implementation of HARK for Sound Source Localization
• タイトル / 言語: en
• タイトル: Energy-Efficient FPGA-Based Implementation of HARK for Sound Source Localization
• 言語: eng
• 資源タイプ / 資源タイプ識別子: http://purl.org/coar/resource_type/c_5794
• 資源タイプ: conference paper
• 著者所属: Tokyo Institute of Technology
• 著者所属: Keio University
• 著者所属: Keio University
• 著者所属: Tokyo Institute of Technology
• 著者所属: Tokyo Institute of Technology
• 著者所属(英): en
• 著者所属(英): Tokyo Institute of Technology
• 著者所属(英): en
• 著者所属(英): Keio University
• 著者所属(英): en
• 著者所属(英): Keio University
• 著者所属(英): en
• 著者所属(英): Tokyo Institute of Technology
• 著者所属(英): en
• 著者所属(英): Tokyo Institute of Technology
• 著者名: Zirui, Lin; Kensuke, Iizuka; Hideharu, Amano; Benjamin, Yen; Kazuhiro, Nakadai
• 著者名(英): Zirui, Lin; Kensuke, Iizuka; Hideharu, Amano; Benjamin, Yen; Kazuhiro, Nakadai
• 論文抄録 / 内容記述タイプ: Other
• 論文抄録 / 内容記述: This paper addresses the efficient implementation of HARK, an open-source software (OSS) platform for robot audition, in edge computing scenarios. Due to the intensive matrix operations, Sound Source Localization (SSL) in HARK requires substantial processing time. To enhance implemenentation performance and energy efficiency on edge devices, two matrix-heavy functions in the SSL module are optimized and deployed on a multi-access FPGA (Field-Programmable Gate Array) SoC (System on a Chip) device―M-KUBOS. The remaining components were kept on the CPU (Central Processing Unit), as this hybrid approach demonstrated better performance than offloading all matrix operations to the FPGA due to lower transmission overhead. Compared to CPU-based processing on an ARM(R) CortexTM A53 CPU, this implementation achieved 1.2× speedup and 1.1× greater energy efficiency.
• 論文抄録(英) / 内容記述タイプ: Other
• 論文抄録(英) / 内容記述: This paper addresses the efficient implementation of HARK, an open-source software (OSS) platform for robot audition, in edge computing scenarios. Due to the intensive matrix operations, Sound Source Localization (SSL) in HARK requires substantial processing time. To enhance implemenentation performance and energy efficiency on edge devices, two matrix-heavy functions in the SSL module are optimized and deployed on a multi-access FPGA (Field-Programmable Gate Array) SoC (System on a Chip) device―M-KUBOS. The remaining components were kept on the CPU (Central Processing Unit), as this hybrid approach demonstrated better performance than offloading all matrix operations to the FPGA due to lower transmission overhead. Compared to CPU-based processing on an ARM(R) CortexTM A53 CPU, this implementation achieved 1.2× speedup and 1.1× greater energy efficiency.
• 書誌情報: Proceedings of Asia Pacific Conference on Robot IoT System Development and Platform; 巻 2024, p. 69-70, 発行日 2024-12-27
• 出版者 / 言語: ja
• 出版者: 情報処理学会