{"links":{},"metadata":{"_oai":{"id":"oai:ipsj.ixsq.nii.ac.jp:00240534","sets":["1164:2036:11466:11785"]},"path":["11785"],"owner":"44499","recid":"240534","title":["極低温状態での集積回路内配線におけるサイズ効果が遅延時間に与える影響"],"pubdate":{"attribute_name":"公開日","attribute_value":"2024-11-05"},"_buckets":{"deposit":"f7842994-e40c-4515-959d-12c6552c7d75"},"_deposit":{"id":"240534","pid":{"type":"depid","value":"240534","revision_id":0},"owners":[44499],"status":"published","created_by":44499},"item_title":"極低温状態での集積回路内配線におけるサイズ効果が遅延時間に与える影響","author_link":["660077","660072","660073","660075","660074","660076","660070","660071"],"item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"極低温状態での集積回路内配線におけるサイズ効果が遅延時間に与える影響"},{"subitem_title":"Impact of Size Effect on Delay Time of On-Chip Interconnects under Cryogenic Conditions","subitem_title_language":"en"}]},"item_type_id":"4","publish_date":"2024-11-05","item_4_text_3":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"滋賀県立大学工学研究科"},{"subitem_text_value":"滋賀県立大学工学研究科"},{"subitem_text_value":"滋賀県立大学工学研究科"},{"subitem_text_value":"滋賀県立大学工学研究科"}]},"item_4_text_4":{"attribute_name":"著者所属(英)","attribute_value_mlt":[{"subitem_text_value":"Graduate School of Engineering, University of Shiga Prefecture","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Engineering, University of Shiga Prefecture","subitem_text_language":"en"},{"subitem_text_value":"Graduate School of Engineering, University of Shiga Prefecture","subitem_text_language":"en"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_publisher":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"情報処理学会","subitem_publisher_language":"ja"}]},"publish_status":"0","weko_shared_id":-1,"item_file_price":{"attribute_name":"Billing file","attribute_type":"file","attribute_value_mlt":[{"url":{"url":"https://ipsj.ixsq.nii.ac.jp/record/240534/files/IPSJ-SLDM24207052.pdf","label":"IPSJ-SLDM24207052.pdf"},"format":"application/pdf","billing":["billing_file"],"filename":"IPSJ-SLDM24207052.pdf","filesize":[{"value":"996.7 kB"}],"mimetype":"application/pdf","priceinfo":[{"tax":["include_tax"],"price":"0","billingrole":"10"},{"tax":["include_tax"],"price":"0","billingrole":"44"}],"accessrole":"open_login","version_id":"eb2aabd3-a0f8-40d1-a7b0-23c991626a73","displaytype":"detail","licensetype":"license_note","license_note":"Copyright (c) 2024 by the Institute of Electronics, Information and Communication Engineers This SIG report is only available to those in membership of the SIG."}]},"item_4_creator_5":{"attribute_name":"著者名","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"植田, 達矢"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"土谷, 亮"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"井上, 敏之"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"岸根, 桂路"}],"nameIdentifiers":[{}]}]},"item_4_creator_6":{"attribute_name":"著者名(英)","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Tatsuya, Ueda","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Akira, Tsuchiya","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Toshiyuki, Inoue","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Keiji, Kishine","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_4_source_id_9":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11451459","subitem_source_identifier_type":"NCID"}]},"item_4_textarea_12":{"attribute_name":"Notice","attribute_value_mlt":[{"subitem_textarea_value":"SIG Technical Reports are nonrefereed and hence may later appear in any journals, conferences, symposia, etc."}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourceuri":"http://purl.org/coar/resource_type/c_18gh","resourcetype":"technical report"}]},"item_4_source_id_11":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"2188-8639","subitem_source_identifier_type":"ISSN"}]},"item_4_description_7":{"attribute_name":"論文抄録","attribute_value_mlt":[{"subitem_description":"量子コンピュータにおいては，量子ビットの制御機能を集積回路化し，極低温環境で動作させることが期待されている．一般的に，温度が下がるにつれ配線抵抗は室温環境に比べて減少し，それに伴い遅延時間も減少する．極低温環境下では，電子の平均自由行程が長くなり，サイズ効果の影響で配線抵抗の減少が緩やかになる．信号伝搬遅延は論理ゲートと配線遅延によって決まる．配線抵抗が十分小さければ論理ゲートによる遅延が支配的になる．しかし，極低温環境下では，サイズ効果の影響で配線遅延の見積りに誤差が生じる．サイズ効果による配線遅延の影響がどの程度の配線で無視できなくなるかは明確ではない．本稿では，極低温環境下でのサイズ効果による配線遅延の影響がどの程度の配線で無視できないか評価した．RRR に基づく配線抵抗の場合と比較して，配線長が 123 ????m の場合，遅延時間が 10% の誤差，配線長が 1000 ????m の場合，80.7% の誤差が生じること明らかにした．","subitem_description_type":"Other"}]},"item_4_description_8":{"attribute_name":"論文抄録(英)","attribute_value_mlt":[{"subitem_description":"In a quantum computer, it is expected that the control function of qubits will be integrated into an integrated circuit and operated in cryogenic environment. In general, as the temperature decreases, the wire resistance decreases , and the delay time also decreases accordingly. At cryogenic environment, mean free path of electrons become longer. The decrease in wire resistance becomes slower due to the size effect. The signal propagation delay is contains the gate delay and interconnect delay. If the wire resistance is sufficiently small, the gate delay is dominant. However, under cryogenic condition, the size effect causes error in the estimation of interconnct delay. It is not clear at what level of wire length the impact of size effect on interconnect delay becomes significant. In this paper, we evaluate the wire length at which the influence of size effect on interconnect delay under cryogenic condition becomes non-negligible. Compared to the case where wire resistance is based on the RRR, we found that there is a 10% error in delay time when the wiring length is 123 ????m, and there is an 80.7% error when the wiring length is 1000 ????m.","subitem_description_type":"Other"}]},"item_4_biblio_info_10":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicPageEnd":"4","bibliographic_titles":[{"bibliographic_title":"研究報告システムとLSIの設計技術（SLDM）"}],"bibliographicPageStart":"1","bibliographicIssueDates":{"bibliographicIssueDate":"2024-11-05","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"52","bibliographicVolumeNumber":"2024-SLDM-207"}]},"relation_version_is_last":true,"weko_creator_id":"44499"},"updated":"2025-01-19T07:56:58.738927+00:00","created":"2025-01-19T01:44:46.724648+00:00","id":240534}